From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 3FF48568E for ; Fri, 29 Jul 2016 12:11:15 +0200 (CEST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 29 Jul 2016 03:11:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,438,1464678000"; d="scan'208";a="855784324" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga003.jf.intel.com with ESMTP; 29 Jul 2016 03:11:14 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 29 Jul 2016 03:11:13 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.181]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.150]) with mapi id 14.03.0248.002; Fri, 29 Jul 2016 18:11:11 +0800 From: "Tan, Jianfeng" To: "Ananyev, Konstantin" , "dev@dpdk.org" CC: "Wu, Jingjing" Thread-Topic: [dpdk-dev] [PATCH v3] i40: fix the VXLAN TSO issue Thread-Index: AQHR4Ou3Mj8Tc/XGBU+GMt2588k/VqAvDyKA//+UFwCAAJb1kA== Date: Fri, 29 Jul 2016 10:11:10 +0000 Message-ID: References: <1467865627-23524-1-git-send-email-zhe.tao@intel.com> <1468843009-14517-1-git-send-email-zhe.tao@intel.com> <3d08c8b3-fc33-ddbc-196b-c43a65d5779f@intel.com> <2601191342CEEE43887BDE71AB97725836B8AF7D@irsmsx105.ger.corp.intel.com> In-Reply-To: <2601191342CEEE43887BDE71AB97725836B8AF7D@irsmsx105.ger.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3] i40: fix the VXLAN TSO issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jul 2016 10:11:15 -0000 > -----Original Message----- > From: Ananyev, Konstantin > Sent: Friday, July 29, 2016 4:46 PM > To: Tan, Jianfeng; dev@dpdk.org > Cc: Wu, Jingjing > Subject: RE: [dpdk-dev] [PATCH v3] i40: fix the VXLAN TSO issue >=20 > Hi Jianfeng, >=20 > > > > Hi, > > > > On 7/18/2016 7:56 PM, Zhe Tao wrote: > > > Problem: > > > When using the TSO + VXLAN feature in i40e, the outer UDP length > > > fields in the multiple UDP segments which are TSOed by the i40e will > > > have a wrong value. > > > > > > Fix this problem by adding the tunnel type field in the i40e > > > descriptor which was missed before. > > > > > > Fixes: 77b8301733c3 ("i40e: VXLAN Tx checksum offload") > > > > > > Signed-off-by: Zhe Tao > > > --- > > > v2: edited the comments > > > v3: added external IP offload flag when TSO is enabled for tunnelling > > > packets > > > > > > app/test-pmd/csumonly.c | 29 +++++++++++++++++++++-------- > > > drivers/net/i40e/i40e_rxtx.c | 12 +++++++++--- > > > lib/librte_mbuf/rte_mbuf.h | 16 +++++++++++++++- > > > 3 files changed, 45 insertions(+), 12 deletions(-) > > > > > ... > > > diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h > > > index 15e3a10..90812ea 100644 > > > --- a/lib/librte_mbuf/rte_mbuf.h > > > +++ b/lib/librte_mbuf/rte_mbuf.h > > > @@ -133,6 +133,17 @@ extern "C" { > > > /* add new TX flags here */ > > > > > > /** > > > + * Bits 45:48 used for the tunnel type. > > > + * When doing Tx offload like TSO or checksum, the HW needs to > > > +configure the > > > + * tunnel type into the HW descriptors. > > > + */ > > > +#define PKT_TX_TUNNEL_VXLAN (1ULL << 45) > > > +#define PKT_TX_TUNNEL_GRE (2ULL << 45) > > > +#define PKT_TX_TUNNEL_IPIP (3ULL << 45) > > > +/* add new TX TUNNEL type here */ > > > +#define PKT_TX_TUNNEL_MASK (0xFULL << 45) > > > + > > > > Above flag bits are added so that i40e driver can tell tunnel type of t= his > packet (udp or gre or ipip), just interested to know how about just do > > a simple analysis like below without introducing these flags? > > > > if outer_ether.proto =3D=3D ipv4 > > l4_proto =3D ipv4_hdr->next_proto; > > else outer_ether.proto =3D=3D ipv6 > > l4_proto =3D ipv6_hdr->next_proto; > > > > switch (l4_proto) > > case ipv4: > > case ipv6: > > tunnel_type =3D ipip; > > break; > > case udp: > > tunnel_type =3D udp; > > break; > > case gre: > > tunnel_type =3D gre; > > break; > > default: > > error; >=20 > Right now none of our PMDs reads/writes actual packet data, > and I think it is better to keep it that way. > It is an upper layer responsibility to specify which offload > needs to be enabled and provide necessary information. > Konstantin Make sense. I'll send out v4 as the original way later. Thanks, Jianfeng