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From: "Zhou, JunX W" <junx.w.zhou@intel.com>
To: "Xu, Ting" <ting.xu@intel.com>, "dev@dpdk.org" <dev@dpdk.org>
CC: "Dumitrescu, Cristian" <cristian.dumitrescu@intel.com>, "stable@dpdk.org"
<stable@dpdk.org>
Thread-Topic: [dpdk-dev] [PATCH v2] lib/table: fix cache alignment issue
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Date: Thu, 2 Jul 2020 08:06:35 +0000
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Subject: Re: [dpdk-dev] [PATCH v2] lib/table: fix cache alignment issue
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-----Original Message-----
From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Ting Xu
Sent: Wednesday, June 17, 2020 1:44 PM
To: dev@dpdk.org
Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; stable@dpdk.org
Subject: [dpdk-dev] [PATCH v2] lib/table: fix cache alignment issue
When create softnic hash table with 16 keys, it failed on 32bit environment=
because of the structure rte_bucket_4_16 alignment issue. Add __rte_cache_=
aligned to ensure correct cache align.
Fixes: 8aa327214c ("table: hash")
Cc: stable@dpdk.org
Signed-off-by: Ting Xu <ting.xu@intel.com>
---
v1->v2: Correct patch time
---
lib/librte_table/rte_table_hash_key16.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/librte_table/rte_table_hash_key16.c b/lib/librte_table/rte=
_table_hash_key16.c
index 2cca1c924..5e1665c15 100644
--- a/lib/librte_table/rte_table_hash_key16.c
+++ b/lib/librte_table/rte_table_hash_key16.c
@@ -44,7 +44,7 @@ struct rte_bucket_4_16 {
uint64_t key[4][2];
=20
/* Cache line 2 */
- uint8_t data[0];
+ uint8_t data[0] __rte_cache_aligned;
};
=20
struct rte_table_hash {
--
2.17.1