From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 793189601 for ; Mon, 22 Dec 2014 03:33:11 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP; 21 Dec 2014 18:31:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,691,1406617200"; d="scan'208";a="502409253" Received: from pgsmsx107.gar.corp.intel.com ([10.221.44.105]) by orsmga003.jf.intel.com with ESMTP; 21 Dec 2014 18:28:35 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by PGSMSX107.gar.corp.intel.com (10.221.44.105) with Microsoft SMTP Server (TLS) id 14.3.195.1; Mon, 22 Dec 2014 10:33:08 +0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.182]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.67]) with mapi id 14.03.0195.001; Mon, 22 Dec 2014 10:33:07 +0800 From: "Zhang, Helin" To: "Ananyev, Konstantin" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH RFC 5/7] ethdev: unification of flow types Thread-Index: AQHQG11Gf0D6+5gxEESdqVVjxwaOa5yXAY2ggAPk46A= Date: Mon, 22 Dec 2014 02:33:07 +0000 Message-ID: References: <1418974005-15536-1-git-send-email-helin.zhang@intel.com> <1418974005-15536-6-git-send-email-helin.zhang@intel.com> <2601191342CEEE43887BDE71AB977258213C23C4@IRSMSX105.ger.corp.intel.com> In-Reply-To: <2601191342CEEE43887BDE71AB977258213C23C4@IRSMSX105.ger.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH RFC 5/7] ethdev: unification of flow types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Dec 2014 02:33:11 -0000 Hi Konstantin > > - > > -/** > > * A structure used to define the input for IPV4 flow > > */ > > struct rte_eth_ipv4_flow { > > @@ -291,7 +302,7 @@ struct rte_eth_fdir_flow_ext { > > * A structure used to define the input for a flow director filter ent= ry > > */ > > struct rte_eth_fdir_input { > > - enum rte_eth_flow_type flow_type; /**< Type of flow */ > > + uint16_t flow_type; /**< Type of flow */ >=20 > Wonder, why do you need to switch from int to uinsigned short for flow_ty= pe? > Konstantin Actually there are same things in rte_ethdev.h and rte_eth_ctrl.h, though s= eems different. The goal is to unify them, so the original type of MACRO was chosen. Using = uint16_t but not enum is also beneficial for compilation, as rte_eth_ctrl.h is included = in rte_ethdev.h. In rte_ethdev.h, it is, /* Supported RSS offloads */ /* for 1G & 10G */ #define ETH_RSS_IPV4_SHIFT 0 #define ETH_RSS_IPV4_TCP_SHIFT 1 #define ETH_RSS_IPV6_SHIFT 2 #define ETH_RSS_IPV6_EX_SHIFT 3 #define ETH_RSS_IPV6_TCP_SHIFT 4 #define ETH_RSS_IPV6_TCP_EX_SHIFT 5 #define ETH_RSS_IPV4_UDP_SHIFT 6 #define ETH_RSS_IPV6_UDP_SHIFT 7 #define ETH_RSS_IPV6_UDP_EX_SHIFT 8 /* for 40G only */ #define ETH_RSS_NONF_IPV4_UDP_SHIFT 31 #define ETH_RSS_NONF_IPV4_TCP_SHIFT 33 #define ETH_RSS_NONF_IPV4_SCTP_SHIFT 34 #define ETH_RSS_NONF_IPV4_OTHER_SHIFT 35 #define ETH_RSS_FRAG_IPV4_SHIFT 36 #define ETH_RSS_NONF_IPV6_UDP_SHIFT 41 #define ETH_RSS_NONF_IPV6_TCP_SHIFT 43 #define ETH_RSS_NONF_IPV6_SCTP_SHIFT 44 #define ETH_RSS_NONF_IPV6_OTHER_SHIFT 45 #define ETH_RSS_FRAG_IPV6_SHIFT 46 #define ETH_RSS_FCOE_OX_SHIFT 48 #define ETH_RSS_FCOE_RX_SHIFT 49 #define ETH_RSS_FCOE_OTHER_SHIFT 50 #define ETH_RSS_L2_PAYLOAD_SHIFT 63 In rte_eth_ctrl.h, it is, /** * Flow type */ enum rte_eth_flow_type { RTE_ETH_FLOW_TYPE_NONE =3D 0, RTE_ETH_FLOW_TYPE_UDPV4, RTE_ETH_FLOW_TYPE_TCPV4, RTE_ETH_FLOW_TYPE_SCTPV4, RTE_ETH_FLOW_TYPE_IPV4_OTHER, RTE_ETH_FLOW_TYPE_FRAG_IPV4, RTE_ETH_FLOW_TYPE_UDPV6, RTE_ETH_FLOW_TYPE_TCPV6, RTE_ETH_FLOW_TYPE_SCTPV6, RTE_ETH_FLOW_TYPE_IPV6_OTHER, RTE_ETH_FLOW_TYPE_FRAG_IPV6, RTE_ETH_FLOW_TYPE_MAX =3D 64, }; Regards, Helin >=20 > > union rte_eth_fdir_flow flow; > > /**< Flow fields to match, dependent on flow_type */ > > struct rte_eth_fdir_flow_ext flow_ext; @@ -371,7 +382,7 @@ struct > > rte_eth_flex_payload_cfg { > > * for each flow type > > */ > > struct rte_eth_fdir_flex_mask { > > - enum rte_eth_flow_type flow_type; /**< Flow type */ > > + uint16_t flow_type; /**< Flow type */ > > uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN]; > > /**< Mask for the whole flexible payload */ }; @@ -385,7 +396,7 @@ > > struct rte_eth_fdir_flex_conf { > > uint16_t nb_flexmasks; /**< The number of following mask */ > > struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX]; > > /**< Flex payload configuration for each payload type */ > > - struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_TYPE_MAX]; > > + struct rte_eth_fdir_flex_mask flex_mask[ETH_FLOW_TYPE_MAX]; > > /**< Flex mask configuration for each flow type */ };