From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id DCCCD5A37 for ; Thu, 22 Jan 2015 08:45:07 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 21 Jan 2015 23:42:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,447,1418112000"; d="scan'208";a="640835466" Received: from pgsmsx108.gar.corp.intel.com ([10.221.44.103]) by orsmga001.jf.intel.com with ESMTP; 21 Jan 2015 23:45:02 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by PGSMSX108.gar.corp.intel.com (10.221.44.103) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 22 Jan 2015 15:44:53 +0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.231]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.92]) with mapi id 14.03.0195.001; Thu, 22 Jan 2015 15:44:47 +0800 From: "Zhang, Helin" To: Thomas Monjalon Thread-Topic: [dpdk-dev] [PATCH v8 3/4] i40e: support of controlling hash functions Thread-Index: AQHQNIddreyrne8OmU6CnvUS5U4J5JzLw2aA Date: Thu, 22 Jan 2015 07:44:47 +0000 Message-ID: References: <1417176852-12345-1-git-send-email-helin.zhang@intel.com> <1417486760-24459-1-git-send-email-helin.zhang@intel.com> <1417486760-24459-4-git-send-email-helin.zhang@intel.com> <3554949.i7emeOiECJ@xps13> In-Reply-To: <3554949.i7emeOiECJ@xps13> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH v8 3/4] i40e: support of controlling hash functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Jan 2015 07:45:08 -0000 Hi Thomas I have sent out v9 of this patch set, with adopting your comments. Thank yo= u very much! > -----Original Message----- > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com] > Sent: Tuesday, January 20, 2015 3:54 PM > To: Zhang, Helin > Cc: dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH v8 3/4] i40e: support of controlling hash > functions >=20 > Hi Helin, >=20 > 2014-12-02 10:19, Helin Zhang: > > Hash filter control has been implemented for i40e. It includes > > getting/setting, > > - global hash configurations (hash function type, and symmetric > > hash enable per flow type) > > - symmetric hash enable per port > > > > Signed-off-by: Helin Zhang > > --- > > lib/librte_ether/rte_eth_ctrl.h | 63 ++++++++ > > lib/librte_pmd_i40e/i40e_ethdev.c | 294 > > +++++++++++++++++++++++++++++++++++++- > > 2 files changed, 355 insertions(+), 2 deletions(-) >=20 > Please, could you split ethdev and i40e parts while keeping Konstantin's = ack? I have split it into two patches. Please forgive my typo (splitted->split) = in changes logs which will not occur in commits. Do I need ask Konstantin to send out his Acked-by again? Or we can just add= it? The only differences is just as below. --- a/lib/librte_ether/rte_eth_ctrl.h +++ b/lib/librte_ether/rte_eth_ctrl.h @@ -485,7 +485,7 @@ enum rte_eth_hash_function { * include symmetric hash enable per flow type and hash function type. * Each bit in sym_hash_enable_mask[] indicates if the symmetric hash of t= he * coresponding flow type is enabled or not. - * Each bit in valid_bit_mask[] indicates if the corresponding bit in + * Each bit in valid_bit_mask[] indicates if the coresponding bit in * sym_hash_enable_mask[] is valid or not. For the configurations gotten, = it * also means if the flow type is supported by hardware or not. */ @@ -493,7 +493,7 @@ struct rte_eth_hash_global_conf { enum rte_eth_hash_function hash_func; /**< Hash function type */ /** Bit mask for symmetric hash enable per flow type */ uint32_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]; - /** Bit mask indicates if the corresponding bit is valid */ + /** Bit mask indicates if the coresponding bit is valid */ uint32_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]; }; =20 @@ -502,12 +502,12 @@ struct rte_eth_hash_global_conf { * type of 'RTE_ETH_FILTER_HASH' and its operations. */ struct rte_eth_hash_filter_info { - enum rte_eth_hash_filter_info_type info_type; /**< Information type= */ - /** Details of hash filter information */ + enum rte_eth_hash_filter_info_type info_type; /**< Information type= . */ + /** Details of hash filter infomation */ union { - /** For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */ + /* For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */ uint8_t enable; - /** Global configurations of hash filter */ + /* Global configurations of hash filter */ struct rte_eth_hash_global_conf global_conf; } info; }; >=20 > [...] > > + * Each bit in valid_bit_mask[] indicates if the coresponding bit in >=20 > Typo: corresponding Thanks, it is corrected in v9. >=20 > [...] > > + /** Bit mask indicates if the coresponding bit is valid */ >=20 > Same typo Thanks, it is corrected in v9. >=20 > [...] > > + /** Details of hash filter infomation */ >=20 > Typo: information Thanks, it is corrected in v9. >=20 > > + union { > > + /* For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */ > > + uint8_t enable; > > + /* Global configurations of hash filter */ > > + struct rte_eth_hash_global_conf global_conf; > > + } info; >=20 > Why these comments are not doxygen'ed? Thanks, it is enabled in v9. >=20 > Sorry for nitpicking, that's the last review pass ;) Don't worry, it is not nitpicking from my point of view. I really appreciat= e your hard works! Thank you! Regards, Helin > -- > Thomas