From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id EA34A5ABE for ; Fri, 30 Jan 2015 07:10:19 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP; 29 Jan 2015 22:03:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,490,1418112000"; d="scan'208";a="670124669" Received: from pgsmsx103.gar.corp.intel.com ([10.221.44.82]) by fmsmga002.fm.intel.com with ESMTP; 29 Jan 2015 22:09:59 -0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by PGSMSX103.gar.corp.intel.com (10.221.44.82) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 30 Jan 2015 14:09:44 +0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.231]) by shsmsx102.ccr.corp.intel.com ([169.254.2.124]) with mapi id 14.03.0195.001; Fri, 30 Jan 2015 14:09:43 +0800 From: "Zhang, Helin" To: "Richardson, Bruce" Thread-Topic: [PATCH 04/17] ixgbe: support of unified packet type Thread-Index: AQHQPBueli343Nob8kKDkvjLxkaGUpzYLj2A Date: Fri, 30 Jan 2015 06:09:42 +0000 Message-ID: References: <1421637666-16872-1-git-send-email-helin.zhang@intel.com> <1422501365-12643-1-git-send-email-helin.zhang@intel.com> <1422501365-12643-5-git-send-email-helin.zhang@intel.com> <20150129233027.GB11276@bricha3-MOBL3> In-Reply-To: <20150129233027.GB11276@bricha3-MOBL3> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH 04/17] ixgbe: support of unified packet type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Jan 2015 06:10:20 -0000 Hi Bruce > -----Original Message----- > From: Richardson, Bruce > Sent: Friday, January 30, 2015 7:30 AM > To: Zhang, Helin > Cc: dev@dpdk.org; Cao, Waterman; Liang, Cunming; Liu, Jijiang; Ananyev, > Konstantin > Subject: Re: [PATCH 04/17] ixgbe: support of unified packet type >=20 > On Thu, Jan 29, 2015 at 11:15:52AM +0800, Helin Zhang wrote: > > To unify packet types among all PMDs, bit masks of packet type for > > ol_flags are replaced by unified packet type for Vector PMD. > > >=20 > Two suggestions on the commit log: > 1. Can you add scalar and vector into the titles to make it clear how thi= s patch > and the previous ones differ 2. Can you add a note calling out performanc= e > impacts for this patch. If no performance impacts, then please note that = for > reviewers. OK. That will be in the v2 patches. Thanks for the good comments! Regards, Helin >=20 > /Bruce >=20 > > Signed-off-by: Cunming Liang > > Signed-off-by: Helin Zhang > > --- > > lib/librte_pmd_ixgbe/ixgbe_rxtx_vec.c | 39 > > +++++++++++++++++++---------------- > > 1 file changed, 21 insertions(+), 18 deletions(-) > > > > diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx_vec.c > > b/lib/librte_pmd_ixgbe/ixgbe_rxtx_vec.c > > index b54cb19..b3cf7dd 100644 > > --- a/lib/librte_pmd_ixgbe/ixgbe_rxtx_vec.c > > +++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx_vec.c > > @@ -134,44 +134,35 @@ ixgbe_rxq_rearm(struct igb_rx_queue *rxq) > > */ > > #ifdef RTE_IXGBE_RX_OLFLAGS_ENABLE > > > > -#define OLFLAGS_MASK ((uint16_t)(PKT_RX_VLAN_PKT | > PKT_RX_IPV4_HDR |\ > > - PKT_RX_IPV4_HDR_EXT | PKT_RX_IPV6_HDR |\ > > - PKT_RX_IPV6_HDR_EXT)) > > -#define OLFLAGS_MASK_V (((uint64_t)OLFLAGS_MASK << 48) | \ > > - ((uint64_t)OLFLAGS_MASK << 32) | \ > > - ((uint64_t)OLFLAGS_MASK << 16) | \ > > - ((uint64_t)OLFLAGS_MASK)) > > -#define PTYPE_SHIFT (1) > > +#define OLFLAGS_MASK_V (((uint64_t)PKT_RX_VLAN_PKT << 48) | \ > > + ((uint64_t)PKT_RX_VLAN_PKT << 32) | \ > > + ((uint64_t)PKT_RX_VLAN_PKT << 16) | \ > > + ((uint64_t)PKT_RX_VLAN_PKT)) > > #define VTAG_SHIFT (3) > > > > static inline void > > desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkts) { > > - __m128i ptype0, ptype1, vtag0, vtag1; > > + __m128i vtag0, vtag1; > > union { > > uint16_t e[4]; > > uint64_t dword; > > } vol; > > > > - ptype0 =3D _mm_unpacklo_epi16(descs[0], descs[1]); > > - ptype1 =3D _mm_unpacklo_epi16(descs[2], descs[3]); > > vtag0 =3D _mm_unpackhi_epi16(descs[0], descs[1]); > > vtag1 =3D _mm_unpackhi_epi16(descs[2], descs[3]); > > > > - ptype1 =3D _mm_unpacklo_epi32(ptype0, ptype1); > > vtag1 =3D _mm_unpacklo_epi32(vtag0, vtag1); > > - > > - ptype1 =3D _mm_slli_epi16(ptype1, PTYPE_SHIFT); > > vtag1 =3D _mm_srli_epi16(vtag1, VTAG_SHIFT); > > > > - ptype1 =3D _mm_or_si128(ptype1, vtag1); > > - vol.dword =3D _mm_cvtsi128_si64(ptype1) & OLFLAGS_MASK_V; > > + vol.dword =3D _mm_cvtsi128_si64(vtag1) & OLFLAGS_MASK_V; > > > > rx_pkts[0]->ol_flags =3D vol.e[0]; > > rx_pkts[1]->ol_flags =3D vol.e[1]; > > rx_pkts[2]->ol_flags =3D vol.e[2]; > > rx_pkts[3]->ol_flags =3D vol.e[3]; > > } > > + > > #else > > #define desc_to_olflags_v(desc, rx_pkts) do {} while (0) #endif @@ > > -204,6 +195,8 @@ _recv_raw_pkts_vec(struct igb_rx_queue *rxq, struct > rte_mbuf **rx_pkts, > > 0 /* ignore pkt_type field */ > > ); > > __m128i dd_check, eop_check; > > + __m128i desc_mask =3D _mm_set_epi32(0xFFFFFFFF, 0xFFFFFFFF, > > + 0xFFFFFFFF, 0xFFFF07F0); > > > > if (unlikely(nb_pkts < RTE_IXGBE_VPMD_RX_BURST)) > > return 0; > > @@ -239,7 +232,8 @@ _recv_raw_pkts_vec(struct igb_rx_queue *rxq, > struct rte_mbuf **rx_pkts, > > 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */ > > 13, 12, /* octet 12~13, low 16 bits pkt_len */ > > 13, 12, /* octet 12~13, 16 bits data_len */ > > - 0xFF, 0xFF /* skip pkt_type field */ > > + 1, /* octet 1, 8 bits pkt_type field */ > > + 0 /* octet 0, 4 bits offset 4 pkt_type field */ > > ); > > > > /* Cache is empty -> need to scan the buffer rings, but first move > > @@ -248,6 +242,7 @@ _recv_raw_pkts_vec(struct igb_rx_queue *rxq, > > struct rte_mbuf **rx_pkts, > > > > /* > > * A. load 4 packet in one loop > > + * [A*. mask out 4 unused dirty field in desc] > > * B. copy 4 mbuf point from swring to rx_pkts > > * C. calc the number of DD bits among the 4 packets > > * [C*. extract the end-of-packet bit, if requested] @@ -289,6 > > +284,14 @@ _recv_raw_pkts_vec(struct igb_rx_queue *rxq, struct rte_mbuf > **rx_pkts, > > /* B.2 copy 2 mbuf point into rx_pkts */ > > _mm_storeu_si128((__m128i *)&rx_pkts[pos+2], mbp2); > > > > + /* A* mask out 0~3 bits RSS type */ > > + descs[3] =3D _mm_and_si128(descs[3], desc_mask); > > + descs[2] =3D _mm_and_si128(descs[2], desc_mask); > > + > > + /* A* mask out 0~3 bits RSS type */ > > + descs[1] =3D _mm_and_si128(descs[1], desc_mask); > > + descs[0] =3D _mm_and_si128(descs[0], desc_mask); > > + > > /* avoid compiler reorder optimization */ > > rte_compiler_barrier(); > > > > @@ -301,7 +304,7 @@ _recv_raw_pkts_vec(struct igb_rx_queue *rxq, > struct rte_mbuf **rx_pkts, > > /* C.1 4=3D>2 filter staterr info only */ > > sterr_tmp1 =3D _mm_unpackhi_epi32(descs[1], descs[0]); > > > > - /* set ol_flags with packet type and vlan tag */ > > + /* set ol_flags with vlan packet type */ > > desc_to_olflags_v(descs, &rx_pkts[pos]); > > > > /* D.2 pkt 3,4 set in_port/nb_seg and remove crc */ > > -- > > 1.8.1.4 > >