From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 64C048D94 for ; Thu, 13 Aug 2015 22:28:45 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 13 Aug 2015 13:28:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,672,1432623600"; d="scan'208";a="768353380" Received: from pgsmsx101.gar.corp.intel.com ([10.221.44.78]) by fmsmga001.fm.intel.com with ESMTP; 13 Aug 2015 13:28:42 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by PGSMSX101.gar.corp.intel.com (10.221.44.78) with Microsoft SMTP Server (TLS) id 14.3.224.2; Fri, 14 Aug 2015 04:28:41 +0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.210]) by shsmsx102.ccr.corp.intel.com ([169.254.2.206]) with mapi id 14.03.0224.002; Fri, 14 Aug 2015 04:28:40 +0800 From: "Zhang, Helin" To: Vlad Zolotarov , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v1] ixgbe_pmd: forbid tx_rs_thresh above 1 for all NICs but 82598 Thread-Index: AQHQ1fLetlF10YIG/kWzzVYFXNo2ap4KX8yw Date: Thu, 13 Aug 2015 20:28:39 +0000 Message-ID: References: <1439489195-31553-1-git-send-email-vladz@cloudius-systems.com> In-Reply-To: <1439489195-31553-1-git-send-email-vladz@cloudius-systems.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1] ixgbe_pmd: forbid tx_rs_thresh above 1 for all NICs but 82598 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Aug 2015 20:28:46 -0000 Hi Vlad I don't think the changes are needed. It says in datasheet that the RS bit = should be set on the last descriptor of every packet, ONLY WHEN TXDCTL.WTHRESH equals= to ZERO. Regards, Helin > -----Original Message----- > From: Vlad Zolotarov [mailto:vladz@cloudius-systems.com] > Sent: Thursday, August 13, 2015 11:07 AM > To: dev@dpdk.org > Cc: Zhang, Helin; Ananyev, Konstantin; avi@cloudius-systems.com; Vlad > Zolotarov > Subject: [dpdk-dev] [PATCH v1] ixgbe_pmd: forbid tx_rs_thresh above 1 for= all > NICs but 82598 >=20 > According to 82599 and x540 HW specifications RS bit *must* be set in the= last > descriptor of *every* packet. There is a condition that if TXDCTL.WTHRESH equal to zero. >=20 > This patch fixes the Tx hang we were constantly hitting with a seastar-ba= sed > application on x540 NIC. Could you help to share with us how to reproduce the tx hang issue, with us= ing typical DPDK examples? >=20 > Signed-off-by: Vlad Zolotarov > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 9 +++++++++ > drivers/net/ixgbe/ixgbe_rxtx.c | 23 ++++++++++++++++++++++- > 2 files changed, 31 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c > b/drivers/net/ixgbe/ixgbe_ethdev.c > index b8ee1e9..6714fd9 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -2414,6 +2414,15 @@ ixgbe_dev_info_get(struct rte_eth_dev *dev, struct > rte_eth_dev_info *dev_info) > .txq_flags =3D ETH_TXQ_FLAGS_NOMULTSEGS | > ETH_TXQ_FLAGS_NOOFFLOADS, > }; > + > + /* > + * According to 82599 and x540 specifications RS bit *must* be set on t= he > + * last descriptor of *every* packet. Therefore we will not allow the > + * tx_rs_thresh above 1 for all NICs newer than 82598. > + */ > + if (hw->mac.type > ixgbe_mac_82598EB) > + dev_info->default_txconf.tx_rs_thresh =3D 1; > + > dev_info->hash_key_size =3D IXGBE_HKEY_MAX_INDEX * sizeof(uint32_t); > dev_info->reta_size =3D ETH_RSS_RETA_SIZE_128; > dev_info->flow_type_rss_offloads =3D IXGBE_RSS_OFFLOAD_ALL; diff --git > a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index > 91023b9..8dbdffc 100644 > --- a/drivers/net/ixgbe/ixgbe_rxtx.c > +++ b/drivers/net/ixgbe/ixgbe_rxtx.c > @@ -2085,11 +2085,19 @@ ixgbe_dev_tx_queue_setup(struct rte_eth_dev > *dev, > struct ixgbe_tx_queue *txq; > struct ixgbe_hw *hw; > uint16_t tx_rs_thresh, tx_free_thresh; > + bool rs_deferring_allowed; >=20 > PMD_INIT_FUNC_TRACE(); > hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); >=20 > /* > + * According to 82599 and x540 specifications RS bit *must* be set on t= he > + * last descriptor of *every* packet. Therefore we will not allow the > + * tx_rs_thresh above 1 for all NICs newer than 82598. > + */ > + rs_deferring_allowed =3D (hw->mac.type <=3D ixgbe_mac_82598EB); > + > + /* > * Validate number of transmit descriptors. > * It must not exceed hardware maximum, and must be multiple > * of IXGBE_ALIGN. > @@ -2110,6 +2118,8 @@ ixgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, > * to transmit a packet is greater than the number of free TX > * descriptors. > * The following constraints must be satisfied: > + * tx_rs_thresh must be less than 2 for NICs for which RS deferring is > + * forbidden (all but 82598). > * tx_rs_thresh must be greater than 0. > * tx_rs_thresh must be less than the size of the ring minus 2. > * tx_rs_thresh must be less than or equal to tx_free_thresh. > @@ -2121,9 +2131,20 @@ ixgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, > * When set to zero use default values. > */ > tx_rs_thresh =3D (uint16_t)((tx_conf->tx_rs_thresh) ? > - tx_conf->tx_rs_thresh : DEFAULT_TX_RS_THRESH); > + tx_conf->tx_rs_thresh : > + (rs_deferring_allowed ? DEFAULT_TX_RS_THRESH : 1)); > tx_free_thresh =3D (uint16_t)((tx_conf->tx_free_thresh) ? > tx_conf->tx_free_thresh : DEFAULT_TX_FREE_THRESH); > + > + if (!rs_deferring_allowed && tx_rs_thresh > 1) { > + PMD_INIT_LOG(ERR, "tx_rs_thresh must be less than 2 since RS " > + "must be set for every packet for this HW. " > + "(tx_rs_thresh=3D%u port=3D%d queue=3D%d)", > + (unsigned int)tx_rs_thresh, > + (int)dev->data->port_id, (int)queue_idx); > + return -(EINVAL); > + } > + > if (tx_rs_thresh >=3D (nb_desc - 2)) { > PMD_INIT_LOG(ERR, "tx_rs_thresh must be less than the number " > "of TX descriptors minus 2. (tx_rs_thresh=3D%u " > -- > 2.1.0