From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id A802E1B1E7 for ; Thu, 21 Dec 2017 04:23:38 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Dec 2017 19:23:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,434,1508828400"; d="scan'208";a="4207657" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga008.fm.intel.com with ESMTP; 20 Dec 2017 19:23:34 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 20 Dec 2017 19:23:27 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.213]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.152]) with mapi id 14.03.0319.002; Thu, 21 Dec 2017 11:23:25 +0800 From: "Zhang, Helin" To: Shweta Choudaha , "dev@dpdk.org" CC: Shweta Choudaha , "Wang, Liang-min" , "Tantilov, Emil S" Thread-Topic: [dpdk-dev] [PATCH v2 2/2] net/ixgbe : backplane port MDIO support Thread-Index: AQHTVws3c75+mdwPY0aDCgFT5s6Qa6NNZzdQ Date: Thu, 21 Dec 2017 03:23:24 +0000 Message-ID: References: <1509978323-9879-1-git-send-email-shweta.choudaha@gmail.com> <1509978323-9879-2-git-send-email-shweta.choudaha@gmail.com> In-Reply-To: <1509978323-9879-2-git-send-email-shweta.choudaha@gmail.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 2/2] net/ixgbe : backplane port MDIO support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Dec 2017 03:23:39 -0000 > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Shweta Choudaha > Sent: Monday, November 6, 2017 10:25 PM > To: dev@dpdk.org > Cc: Shweta Choudaha > Subject: [dpdk-dev] [PATCH v2 2/2] net/ixgbe : backplane port MDIO suppor= t >=20 > From: Shweta Choudaha >=20 > Initialize MDIO read/write functions for backplan port > (IXGBE_DEV_ID_X550EM_A_KR_L) to enable read/write registers via MDIO >=20 > Signed-off-by: Shweta Choudaha > Reviewed-by: Chas Williams > Reviewed-by: Luca Boccassi > --- > drivers/net/ixgbe/base/ixgbe_x550.c | 1 + > 1 file changed, 1 insertion(+) >=20 > diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c > b/drivers/net/ixgbe/base/ixgbe_x550.c > index 9862391..3f89dc4 100644 > --- a/drivers/net/ixgbe/base/ixgbe_x550.c > +++ b/drivers/net/ixgbe/base/ixgbe_x550.c > @@ -2374,6 +2374,7 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw > *hw) > } >=20 > switch (hw->device_id) { > + case IXGBE_DEV_ID_X550EM_A_KR_L: Basically the source files in 'base' folder is handled by Intel, I will che= ck if this code change is acceptable by some internal stakeholders. I will let you kno= w later. Thanks, Helin > case IXGBE_DEV_ID_X550EM_A_1G_T: > case IXGBE_DEV_ID_X550EM_A_1G_T_L: > phy->ops.read_reg_mdi =3D ixgbe_read_phy_reg_mdi_22; > -- > 2.1.4