From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 6D9A6A05D3 for ; Tue, 21 May 2019 07:50:10 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7555510BD; Tue, 21 May 2019 07:50:09 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 60672A49 for ; Tue, 21 May 2019 07:50:07 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 May 2019 22:50:04 -0700 X-ExtLoop1: 1 Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga001.jf.intel.com with ESMTP; 20 May 2019 22:50:04 -0700 Received: from fmsmsx116.amr.corp.intel.com (10.18.116.20) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 20 May 2019 22:50:04 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx116.amr.corp.intel.com (10.18.116.20) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 20 May 2019 22:50:04 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.129]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.18]) with mapi id 14.03.0415.000; Tue, 21 May 2019 13:50:01 +0800 From: "Yang, Qiming" To: "Wang, Haiyue" , "dev@dpdk.org" , "Zhang, Qi Z" , "Wu, Jingjing" , "Lu, Wenzhuo" Thread-Topic: [PATCH v1] net/ice: update the RSS RETA size with support values Thread-Index: AQHVDuSbIzxpT9w9XEimITel2gVqoaZ1ErVQ Date: Tue, 21 May 2019 05:50:00 +0000 Message-ID: References: <1558340073-87597-1-git-send-email-haiyue.wang@intel.com> In-Reply-To: <1558340073-87597-1-git-send-email-haiyue.wang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZmMwYjZhNzAtNzBhYS00NDRjLTllNmMtNjMxMTNhMmZjODJjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiZU5Ja2V6cE5nYytiZzd0a0ZPSlJXTU1tcUJ0OVFVUTkrdnl6eXZlcHd2Y3AyeVZSNmFHQlhZdUJteEhGRnFseSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1] net/ice: update the RSS RETA size with support values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Little comments. > -----Original Message----- > From: Wang, Haiyue > Sent: Monday, May 20, 2019 4:15 PM > To: dev@dpdk.org; Zhang, Qi Z ; Yang, Qiming > ; Wu, Jingjing ; Lu, > Wenzhuo > Cc: Wang, Haiyue > Subject: [PATCH v1] net/ice: update the RSS RETA size with support values >=20 > Since ice can support 128, 512, 2K RSS RETA size value, change the update > API to set it to resize the RSS RETA table. And by default, use 512 to sy= nc > with ETH_RSS_RETA_SIZE_x maximum value definition. > Also the flag ICE_FLAG_RSS_AQ_CAPABLE is missed to set. >=20 > Fixes: 690175ee51bf ("net/ice: support getting device information") > Fixes: ff963bfa7cb1 ("net/ice: support RSS") >=20 > Signed-off-by: Haiyue Wang > --- > drivers/net/ice/ice_ethdev.c | 41 +++++++++++++++++++++++++++-----------= --- > 1 file changed, 27 insertions(+), 14 deletions(-) >=20 > diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c = index > bbaa7cf..c4ea09f 100644 > --- a/drivers/net/ice/ice_ethdev.c > +++ b/drivers/net/ice/ice_ethdev.c > @@ -1149,6 +1149,12 @@ ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type > type) > TAILQ_INIT(&vsi->mac_list); > TAILQ_INIT(&vsi->vlan_list); >=20 > + /* Be sync with ETH_RSS_RETA_SIZE_x maximum value definition */ I think this stats is not clear, can't understand what's the ETH_RSS_RETA_S= IZE_x maximum value, why don't say the default max Value is 512? > + pf->hash_lut_size =3D hw->func_caps.common_cap.rss_table_size > > + ETH_RSS_RETA_SIZE_512 ? ETH_RSS_RETA_SIZE_512 : > + hw->func_caps.common_cap.rss_table_size; > + pf->flags |=3D ICE_FLAG_RSS_AQ_CAPABLE; > + > memset(&vsi_ctx, 0, sizeof(vsi_ctx)); > /* base_queue in used in queue mapping of VSI add/update > command. > * Suppose vsi->base_queue is 0 now, don't consider SRIOV, VMDQ > @@ -1627,7 +1633,7 @@ static int ice_init_rss(struct ice_pf *pf) > rss_conf =3D &dev->data->dev_conf.rx_adv_conf.rss_conf; > nb_q =3D dev->data->nb_rx_queues; > vsi->rss_key_size =3D ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE; > - vsi->rss_lut_size =3D hw->func_caps.common_cap.rss_table_size; > + vsi->rss_lut_size =3D pf->hash_lut_size; >=20 > if (is_safe_mode) { > PMD_DRV_LOG(WARNING, "RSS is not supported in safe > mode\n"); @@ -2033,7 +2039,7 @@ ice_dev_info_get(struct rte_eth_dev > *dev, struct rte_eth_dev_info *dev_info) > dev_info->rx_queue_offload_capa =3D 0; > dev_info->tx_queue_offload_capa =3D 0; >=20 > - dev_info->reta_size =3D hw->func_caps.common_cap.rss_table_size; > + dev_info->reta_size =3D pf->hash_lut_size; > dev_info->hash_key_size =3D (VSIQF_HKEY_MAX_INDEX + 1) * > sizeof(uint32_t); >=20 > dev_info->default_rxconf =3D (struct rte_eth_rxconf) { @@ -2605,28 > +2611,31 @@ ice_rss_reta_update(struct rte_eth_dev *dev, > uint16_t reta_size) > { > struct ice_pf *pf =3D ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); > - struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > - uint16_t i, lut_size =3D hw->func_caps.common_cap.rss_table_size; > + uint16_t i, lut_size =3D pf->hash_lut_size; > uint16_t idx, shift; > uint8_t *lut; > int ret; >=20 > - if (reta_size !=3D lut_size || > - reta_size > ETH_RSS_RETA_SIZE_512) { > + if (reta_size !=3D ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128 && > + reta_size !=3D ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512 && > + reta_size !=3D ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K) { > PMD_DRV_LOG(ERR, > "The size of hash lookup table configured (%d)" > "doesn't match the number hardware can " > - "supported (%d)", > - reta_size, lut_size); > + "supported (128, 512, 2048)", > + reta_size); > return -EINVAL; > } >=20 > - lut =3D rte_zmalloc(NULL, reta_size, 0); > + /* It MUST use the current LUT size to get the RSS lookup table, > + * otherwise if will fail with -100 error code. > + */ I think it's no need too detail explain. /* use current size to create look= up table*/ > + lut =3D rte_zmalloc(NULL, RTE_MAX(reta_size, lut_size), 0); > if (!lut) { > PMD_DRV_LOG(ERR, "No memory can be allocated"); > return -ENOMEM; > } > - ret =3D ice_get_rss_lut(pf->main_vsi, lut, reta_size); > + ret =3D ice_get_rss_lut(pf->main_vsi, lut, lut_size); > if (ret) > goto out; >=20 > @@ -2637,6 +2646,12 @@ ice_rss_reta_update(struct rte_eth_dev *dev, > lut[i] =3D reta_conf[idx].reta[shift]; > } > ret =3D ice_set_rss_lut(pf->main_vsi, lut, reta_size); > + if (ret =3D=3D 0 && lut_size !=3D reta_size) { > + PMD_DRV_LOG(INFO, > + "The size of hash lookup table is changed from (%d) > to (%d)", > + lut_size, reta_size); > + pf->hash_lut_size =3D reta_size; > + } >=20 > out: > rte_free(lut); > @@ -2650,14 +2665,12 @@ ice_rss_reta_query(struct rte_eth_dev *dev, > uint16_t reta_size) > { > struct ice_pf *pf =3D ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); > - struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > - uint16_t i, lut_size =3D hw->func_caps.common_cap.rss_table_size; > + uint16_t i, lut_size =3D pf->hash_lut_size; > uint16_t idx, shift; > uint8_t *lut; > int ret; >=20 > - if (reta_size !=3D lut_size || > - reta_size > ETH_RSS_RETA_SIZE_512) { > + if (reta_size !=3D lut_size) { > PMD_DRV_LOG(ERR, > "The size of hash lookup table configured (%d)" > "doesn't match the number hardware can " > -- > 2.7.4