DPDK patches and discussions
 help / color / mirror / Atom feed
From: Ruifeng Wang <Ruifeng.Wang@arm.com>
To: Suanming Mou <suanmingm@mellanox.com>,
	Matan Azrad <matan@mellanox.com>,
	Shahaf Shuler <shahafs@mellanox.com>,
	Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
	"rasland@mellanox.com" <rasland@mellanox.com>,
	Lijian Zhang <Lijian.Zhang@arm.com>
Subject: Re: [dpdk-dev] [PATCH] net/mlx5: fix indexed pool bitmap initialization
Date: Wed, 29 Apr 2020 01:47:16 +0000
Message-ID: <HE1PR0801MB2025146B2AD65CB1E3EBDC0C9EAD0@HE1PR0801MB2025.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <1588065217-199098-1-git-send-email-suanmingm@mellanox.com>


> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Suanming Mou
> Sent: Tuesday, April 28, 2020 5:14 PM
> To: Matan Azrad <matan@mellanox.com>; Shahaf Shuler
> <shahafs@mellanox.com>; Viacheslav Ovsiienko
> <viacheslavo@mellanox.com>
> Cc: dev@dpdk.org; rasland@mellanox.com; Lijian Zhang
> <Lijian.Zhang@arm.com>
> Subject: [dpdk-dev] [PATCH] net/mlx5: fix indexed pool bitmap initialization
>
> Currently, the indexed memory pool bitmap start address is not aligned to
> cacheline size explicitly. The bitmap initialization requires the address should
> be cacheline aligned. In that case, the initialization maybe failed if the
> address is not cacheline aligned.
>
> Add RTE_CACHE_LINE_ROUNDUP() to the trunk size calculation to make sure
> the bitmap offset address will start with cacheline aligned.
>
> Fixes: a3cf59f56c47 ("net/mlx5: add indexed memory pool")
>
> Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
> Tested-by: Lijian Zhang <Lijian.Zhang@arm.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_utils.c | 10 +++++++---
> drivers/net/mlx5/mlx5_utils.h |  2 +-
>  2 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5_utils.c b/drivers/net/mlx5/mlx5_utils.c
> index 2146ffd..d29fbcb 100644
> --- a/drivers/net/mlx5/mlx5_utils.c
> +++ b/drivers/net/mlx5/mlx5_utils.c
> @@ -265,7 +265,9 @@ struct mlx5_indexed_pool *
>  trunk_size += sizeof(*trunk);
>  data_size = mlx5_trunk_size_get(pool, idx);
>  bmp_size = rte_bitmap_get_memory_footprint(data_size);
> -trunk_size += data_size * pool->cfg.size + bmp_size;
> +/* rte_bitmap requires memory cacheline aligned. */
> +trunk_size += RTE_CACHE_LINE_ROUNDUP(data_size * pool-
> >cfg.size);
> +trunk_size += bmp_size;
>  trunk = pool->cfg.malloc(pool->cfg.type, trunk_size,
>   RTE_CACHE_LINE_SIZE, rte_socket_id());
>  if (!trunk)
> @@ -278,8 +280,10 @@ struct mlx5_indexed_pool *
>  MLX5_ASSERT(pool->free_list == TRUNK_INVALID);
>  pool->free_list = idx;
>  /* Mark all entries as available. */
> -trunk->bmp = rte_bitmap_init_with_all_set(data_size,
> -     &trunk->data[data_size * pool->cfg.size], bmp_size);
> +trunk->bmp = rte_bitmap_init_with_all_set(data_size, &trunk->data
> +     [RTE_CACHE_LINE_ROUNDUP(data_size * pool->cfg.size)],
> +     bmp_size);
> +MLX5_ASSERT(trunk->bmp);
>  pool->n_trunk_valid++;
>  #ifdef POOL_DEBUG
>  pool->trunk_new++;
> diff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h
> index d81ace3..1248caa 100644
> --- a/drivers/net/mlx5/mlx5_utils.h
> +++ b/drivers/net/mlx5/mlx5_utils.h
> @@ -115,7 +115,7 @@ struct mlx5_indexed_trunk {
>  uint32_t next; /* Next free trunk in free list. */
>  uint32_t free; /* Free entries available */
>  struct rte_bitmap *bmp;
> -uint8_t data[] __rte_cache_min_aligned; /* Entry data start. */
> +uint8_t data[] __rte_cache_aligned; /* Entry data start. */
>  };
>
>  struct mlx5_indexed_pool {
> --
> 1.8.3.1
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

  reply	other threads:[~2020-04-29  1:47 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-28  9:13 Suanming Mou
2020-04-29  1:47 ` Ruifeng Wang [this message]
2020-04-30 10:29 ` Raslan Darawsheh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=HE1PR0801MB2025146B2AD65CB1E3EBDC0C9EAD0@HE1PR0801MB2025.eurprd08.prod.outlook.com \
    --to=ruifeng.wang@arm.com \
    --cc=Lijian.Zhang@arm.com \
    --cc=dev@dpdk.org \
    --cc=matan@mellanox.com \
    --cc=rasland@mellanox.com \
    --cc=shahafs@mellanox.com \
    --cc=suanmingm@mellanox.com \
    --cc=viacheslavo@mellanox.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

DPDK patches and discussions

This inbox may be cloned and mirrored by anyone:

	git clone --mirror https://inbox.dpdk.org/dev/0 dev/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 dev dev/ https://inbox.dpdk.org/dev \
		dev@dpdk.org
	public-inbox-index dev

Example config snippet for mirrors.
Newsgroup available over NNTP:
	nntp://inbox.dpdk.org/inbox.dpdk.dev


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git