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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: LV2PR11MB5997.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0ca0208f-efa6-4027-1522-08db582b0fca X-MS-Exchange-CrossTenant-originalarrivaltime: 19 May 2023 05:36:57.4178 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: VFtSquBstPdI9/XEw/Ahj9MxgBI7T6jPWWpVxj7ZIQyPS9c6wA7RTOZMLsqDssLz6fRYvhFHRec+M7x9ifRyIQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR11MB7562 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Liu, Mingxia > Sent: Monday, April 24, 2023 4:55 PM > To: Xing, Beilei ; Wu, Jingjing > Cc: dev@dpdk.org > Subject: RE: [PATCH 04/10] net/cpfl: add haipin queue group during vpotr = init >=20 >=20 >=20 > > -----Original Message----- > > From: Xing, Beilei > > Sent: Friday, April 21, 2023 2:51 PM > > To: Wu, Jingjing > > Cc: dev@dpdk.org; Liu, Mingxia ; Xing, Beilei > > > > Subject: [PATCH 04/10] net/cpfl: add haipin queue group during vpotr > > init > [Liu, Mingxia] vpotr , spelling error? Good catch, thanks. > > > > From: Beilei Xing > > > > This patch adds haipin queue group during vpotr init. > > > > Signed-off-by: Mingxia Liu > > Signed-off-by: Beilei Xing > > --- > > drivers/net/cpfl/cpfl_ethdev.c | 125 > > +++++++++++++++++++++++++++++++++ drivers/net/cpfl/cpfl_ethdev.h | > > 17 +++++ > > drivers/net/cpfl/cpfl_rxtx.h | 4 ++ > > 3 files changed, 146 insertions(+) > > > > diff --git a/drivers/net/cpfl/cpfl_ethdev.c > > b/drivers/net/cpfl/cpfl_ethdev.c index 114fc18f5f..ad5ddebd3a 100644 > > --- a/drivers/net/cpfl/cpfl_ethdev.c > > +++ b/drivers/net/cpfl/cpfl_ethdev.c > > @@ -856,6 +856,20 @@ cpfl_dev_stop(struct rte_eth_dev *dev) > > return 0; > > } > > > > +static int > > +cpfl_p2p_queue_grps_del(struct idpf_vport *vport) { > > + struct virtchnl2_queue_group_id > > qg_ids[CPFL_P2P_NB_QUEUE_GRPS] =3D {0}; > > + int ret =3D 0; > > + > > + qg_ids[0].queue_group_id =3D CPFL_P2P_QUEUE_GRP_ID; > > + qg_ids[0].queue_group_type =3D VIRTCHNL2_QUEUE_GROUP_P2P; > > + ret =3D idpf_vc_queue_grps_del(vport, CPFL_P2P_NB_QUEUE_GRPS, > > qg_ids); > > + if (ret) > > + PMD_DRV_LOG(ERR, "Failed to delete p2p queue groups"); > > + return ret; > > +} > > + > > static int > > cpfl_dev_close(struct rte_eth_dev *dev) { @@ -864,6 +878,9 @@ > > cpfl_dev_close(struct rte_eth_dev *dev) > > struct cpfl_adapter_ext *adapter =3D CPFL_ADAPTER_TO_EXT(vport- > > >adapter); > > > > cpfl_dev_stop(dev); > > + > > + cpfl_p2p_queue_grps_del(vport); > > + > > idpf_vport_deinit(vport); > > > > adapter->cur_vports &=3D ~RTE_BIT32(vport->devarg_id); @@ - > > 1350,6 +1367,96 @@ cpfl_vport_idx_alloc(struct cpfl_adapter_ext > > *adapter) > > return vport_idx; > > } > > > > +static int > > +cpfl_p2p_q_grps_add(struct idpf_vport *vport, > > + struct virtchnl2_add_queue_groups > > *p2p_queue_grps_info, > > + uint8_t *p2p_q_vc_out_info) > > +{ > > + int ret; > > + > > + p2p_queue_grps_info->vport_id =3D vport->vport_id; > > + p2p_queue_grps_info->qg_info.num_queue_groups =3D > > CPFL_P2P_NB_QUEUE_GRPS; > > + p2p_queue_grps_info->qg_info.groups[0].num_rx_q =3D > > CPFL_MAX_P2P_NB_QUEUES; > > + p2p_queue_grps_info->qg_info.groups[0].num_rx_bufq =3D > > CPFL_P2P_NB_RX_BUFQ; > > + p2p_queue_grps_info->qg_info.groups[0].num_tx_q =3D > > CPFL_MAX_P2P_NB_QUEUES; > > + p2p_queue_grps_info->qg_info.groups[0].num_tx_complq =3D > > CPFL_P2P_NB_TX_COMPLQ; > > + p2p_queue_grps_info->qg_info.groups[0].qg_id.queue_group_id =3D > > CPFL_P2P_QUEUE_GRP_ID; > > + p2p_queue_grps_info->qg_info.groups[0].qg_id.queue_group_type > > =3D VIRTCHNL2_QUEUE_GROUP_P2P; > > + p2p_queue_grps_info- > > >qg_info.groups[0].rx_q_grp_info.rss_lut_size =3D 0; > > + p2p_queue_grps_info->qg_info.groups[0].tx_q_grp_info.tx_tc =3D 0; > > + p2p_queue_grps_info->qg_info.groups[0].tx_q_grp_info.priority =3D > > 0; > > + p2p_queue_grps_info->qg_info.groups[0].tx_q_grp_info.is_sp =3D 0; > > + p2p_queue_grps_info->qg_info.groups[0].tx_q_grp_info.pir_weight > > =3D 0; > > + > > + ret =3D idpf_vc_queue_grps_add(vport, p2p_queue_grps_info, > > p2p_q_vc_out_info); > > + if (ret !=3D 0) { > > + PMD_DRV_LOG(ERR, "Failed to add p2p queue groups."); > > + return ret; > > + } > > + > > + return ret; > > +} > > + > > +static int > > +cpfl_p2p_queue_info_init(struct cpfl_vport *cpfl_vport, > > + struct virtchnl2_add_queue_groups > > *p2p_q_vc_out_info) { > > + struct p2p_queue_chunks_info *p2p_q_chunks_info =3D > > &cpfl_vport->p2p_q_chunks_info; > > + struct virtchnl2_queue_reg_chunks *vc_chunks_out; > > + int i, type; > > + > > + if (p2p_q_vc_out_info- > > >qg_info.groups[0].qg_id.queue_group_type !=3D > > + VIRTCHNL2_QUEUE_GROUP_P2P) { > > + PMD_DRV_LOG(ERR, "Add queue group response > > mismatch."); > > + return -EINVAL; > > + } > > + > > + vc_chunks_out =3D &p2p_q_vc_out_info->qg_info.groups[0].chunks; > > + > > + for (i =3D 0; i < vc_chunks_out->num_chunks; i++) { > > + type =3D vc_chunks_out->chunks[i].type; > > + switch (type) { > > + case VIRTCHNL2_QUEUE_TYPE_TX: > > + p2p_q_chunks_info->tx_start_qid =3D > > + vc_chunks_out->chunks[i].start_queue_id; > > + p2p_q_chunks_info->tx_qtail_start =3D > > + vc_chunks_out->chunks[i].qtail_reg_start; > > + p2p_q_chunks_info->tx_qtail_spacing =3D > > + vc_chunks_out->chunks[i].qtail_reg_spacing; > > + break; > > + case VIRTCHNL2_QUEUE_TYPE_RX: > > + p2p_q_chunks_info->rx_start_qid =3D > > + vc_chunks_out->chunks[i].start_queue_id; > > + p2p_q_chunks_info->rx_qtail_start =3D > > + vc_chunks_out->chunks[i].qtail_reg_start; > > + p2p_q_chunks_info->rx_qtail_spacing =3D > > + vc_chunks_out->chunks[i].qtail_reg_spacing; > > + break; > > + case VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION: > > + p2p_q_chunks_info->tx_compl_start_qid =3D > > + vc_chunks_out->chunks[i].start_queue_id; > > + p2p_q_chunks_info->tx_compl_qtail_start =3D > > + vc_chunks_out->chunks[i].qtail_reg_start; > > + p2p_q_chunks_info->tx_compl_qtail_spacing =3D > > + vc_chunks_out->chunks[i].qtail_reg_spacing; > > + break; > > + case VIRTCHNL2_QUEUE_TYPE_RX_BUFFER: > > + p2p_q_chunks_info->rx_buf_start_qid =3D > > + vc_chunks_out->chunks[i].start_queue_id; > > + p2p_q_chunks_info->rx_buf_qtail_start =3D > > + vc_chunks_out->chunks[i].qtail_reg_start; > > + p2p_q_chunks_info->rx_buf_qtail_spacing =3D > > + vc_chunks_out->chunks[i].qtail_reg_spacing; > > + break; > > + default: > > + PMD_DRV_LOG(ERR, "Unsupported queue type"); > > + break; > > + } > > + } > > + > > + return 0; > > +} > > + > > static int > > cpfl_dev_vport_init(struct rte_eth_dev *dev, void *init_params) { @@ > > - > > 1359,6 +1466,8 @@ cpfl_dev_vport_init(struct rte_eth_dev *dev, void > > *init_params) > > struct cpfl_adapter_ext *adapter =3D param->adapter; > > /* for sending create vport virtchnl msg prepare */ > > struct virtchnl2_create_vport create_vport_info; > > + struct virtchnl2_add_queue_groups p2p_queue_grps_info; > > + uint8_t p2p_q_vc_out_info[IDPF_DFLT_MBX_BUF_SIZE] =3D {0}; > > int ret =3D 0; > > > > dev->dev_ops =3D &cpfl_eth_dev_ops; > > @@ -1380,6 +1489,19 @@ cpfl_dev_vport_init(struct rte_eth_dev *dev, > > void *init_params) > > goto err; > > } > > > > + memset(&p2p_queue_grps_info, 0, sizeof(p2p_queue_grps_info)); > > + ret =3D cpfl_p2p_q_grps_add(vport, &p2p_queue_grps_info, > > p2p_q_vc_out_info); > > + if (ret !=3D 0) { > > + PMD_INIT_LOG(ERR, "Failed to add p2p queue group."); > > + goto err_q_grps_add; > > + } > > + ret =3D cpfl_p2p_queue_info_init(cpfl_vport, > > + (struct virtchnl2_add_queue_groups > > *)p2p_q_vc_out_info); > > + if (ret !=3D 0) { > > + PMD_INIT_LOG(ERR, "Failed to init p2p queue info."); > > + goto err_p2p_qinfo_init; > > + } > > + > > adapter->vports[param->idx] =3D cpfl_vport; > > adapter->cur_vports |=3D RTE_BIT32(param->devarg_id); > > adapter->cur_vport_nb++; > > @@ -1397,6 +1519,9 @@ cpfl_dev_vport_init(struct rte_eth_dev *dev, > > void *init_params) > > return 0; > > > > err_mac_addrs: > > +err_p2p_qinfo_init: > > + cpfl_p2p_queue_grps_del(vport); > > +err_q_grps_add: > > adapter->vports[param->idx] =3D NULL; /* reset */ > > idpf_vport_deinit(vport); > > adapter->cur_vports &=3D ~RTE_BIT32(param->devarg_id); diff --git > > a/drivers/net/cpfl/cpfl_ethdev.h b/drivers/net/cpfl/cpfl_ethdev.h > > index 81fe9ac4c3..5e2e7a1bfb 100644 > > --- a/drivers/net/cpfl/cpfl_ethdev.h > > +++ b/drivers/net/cpfl/cpfl_ethdev.h > > @@ -69,8 +69,25 @@ struct cpfl_devargs { > > uint16_t req_vport_nb; > > }; > > > > +struct p2p_queue_chunks_info { > > + uint32_t tx_start_qid; > > + uint32_t rx_start_qid; > > + uint32_t tx_compl_start_qid; > > + uint32_t rx_buf_start_qid; > > + > > + uint64_t tx_qtail_start; > > + uint32_t tx_qtail_spacing; > > + uint64_t rx_qtail_start; > > + uint32_t rx_qtail_spacing; > > + uint64_t tx_compl_qtail_start; > > + uint32_t tx_compl_qtail_spacing; > > + uint64_t rx_buf_qtail_start; > > + uint32_t rx_buf_qtail_spacing; > > +}; > > + > > struct cpfl_vport { > > struct idpf_vport base; > > + struct p2p_queue_chunks_info p2p_q_chunks_info; > > }; > > > > struct cpfl_adapter_ext { > > diff --git a/drivers/net/cpfl/cpfl_rxtx.h > > b/drivers/net/cpfl/cpfl_rxtx.h index > > b2b3537d10..3a87a1f4b3 100644 > > --- a/drivers/net/cpfl/cpfl_rxtx.h > > +++ b/drivers/net/cpfl/cpfl_rxtx.h > > @@ -17,6 +17,10 @@ > > #define CPFL_MAX_HAIRPINQ_TX_2_RX 1 > > #define CPFL_MAX_HAIRPINQ_NB_DESC 1024 > > #define CPFL_MAX_P2P_NB_QUEUES 16 > > +#define CPFL_P2P_NB_RX_BUFQ 1 > > +#define CPFL_P2P_NB_TX_COMPLQ 1 > > +#define CPFL_P2P_NB_QUEUE_GRPS 1 > > +#define CPFL_P2P_QUEUE_GRP_ID 1 > > /* Base address of the HW descriptor ring should be 128B aligned. */ > > #define CPFL_RING_BASE_ALIGN 128 > > > > -- > > 2.26.2