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From: "Coyle, David" <david.coyle@intel.com>
To: "Rong, Leyi" <leyi.rong@intel.com>,
	"Zhang, Qi Z" <qi.z.zhang@intel.com>,
	 "Lu, Wenzhuo" <wenzhuo.lu@intel.com>,
	"Xing, Beilei" <beilei.xing@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, "Rong, Leyi" <leyi.rong@intel.com>
Subject: Re: [dpdk-dev] [PATCH] net/iavf: fix pkt len parsing in AVX512
Date: Wed, 24 Mar 2021 10:40:54 +0000	[thread overview]
Message-ID: <MN2PR11MB3550ACED341F6B33A045D0A3E3639@MN2PR11MB3550.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20210317091756.11878-1-leyi.rong@intel.com>

Hi Leyi

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Leyi Rong
> Sent: Wednesday, March 17, 2021 9:18 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Lu, Wenzhuo
> <wenzhuo.lu@intel.com>; Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; Rong, Leyi <leyi.rong@intel.com>
> Subject: [dpdk-dev] [PATCH] net/iavf: fix pkt len parsing in AVX512
> 
> Fix pkt_len parsing when DEV_RX_OFFLOAD_KEEP_CRC is set in AVX512
> path.
> 
> Fixes: 31737f2b66fb ("net/iavf: enable AVX512 for legacy Rx")
> Fixes: 6df587028e57 ("net/iavf: enable AVX512 for flexible Rx")
> 
> Signed-off-by: Leyi Rong <leyi.rong@intel.com>
> ---
>  drivers/net/iavf/iavf_rxtx_vec_avx512.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx512.c
> b/drivers/net/iavf/iavf_rxtx_vec_avx512.c
> index 5cb4c7cda6..67184ae3f4 100644
> --- a/drivers/net/iavf/iavf_rxtx_vec_avx512.c
> +++ b/drivers/net/iavf/iavf_rxtx_vec_avx512.c
> @@ -380,7 +380,7 @@ _iavf_recv_raw_pkts_vec_avx512(struct
> iavf_rx_queue *rxq,
>  								len4_7);
>  		__m512i mb4_7 = _mm512_shuffle_epi8(desc4_7,
> shuf_msk);
> 
> -		mb4_7 = _mm512_add_epi16(mb4_7, crc_adjust);
> +		mb4_7 = _mm512_add_epi32(mb4_7, crc_adjust);
>  		/**
>  		 * to get packet types, shift 64-bit values down 30 bits
>  		 * and so ptype is in lower 8-bits in each @@ -411,7 +411,7
> @@ _iavf_recv_raw_pkts_vec_avx512(struct iavf_rx_queue *rxq,
>  								len0_3);
>  		__m512i mb0_3 = _mm512_shuffle_epi8(desc0_3,
> shuf_msk);
> 
> -		mb0_3 = _mm512_add_epi16(mb0_3, crc_adjust);
> +		mb0_3 = _mm512_add_epi32(mb0_3, crc_adjust);
>  		/* get the packet types */
>  		const __m512i ptypes0_3 = _mm512_srli_epi64(desc0_3, 30);
>  		const __m256i ptypes2_3 =
> _mm512_extracti64x4_epi64(ptypes0_3, 1); @@ -869,7 +869,7 @@
> _iavf_recv_raw_pkts_vec_avx512_flex_rxd(struct iavf_rx_queue *rxq,
>  		 */
>  		__m512i mb4_7 = _mm512_shuffle_epi8(raw_desc4_7,
> shuf_msk);
> 
> -		mb4_7 = _mm512_add_epi16(mb4_7, crc_adjust);
> +		mb4_7 = _mm512_add_epi32(mb4_7, crc_adjust);
>  		/**
>  		 * to get packet types, ptype is located in bit16-25
>  		 * of each 128bits
> @@ -898,7 +898,7 @@ _iavf_recv_raw_pkts_vec_avx512_flex_rxd(struct
> iavf_rx_queue *rxq,
>  		 */
>  		__m512i mb0_3 = _mm512_shuffle_epi8(raw_desc0_3,
> shuf_msk);
> 
> -		mb0_3 = _mm512_add_epi16(mb0_3, crc_adjust);
> +		mb0_3 = _mm512_add_epi32(mb0_3, crc_adjust);
>  		/**
>  		 * to get packet types, ptype is located in bit16-25
>  		 * of each 128bits
> --
> 2.25.1

This patch fixes the issue

Tested-by: David Coyle <david.coyle@intel.com>

  reply	other threads:[~2021-03-24 10:41 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-17  9:17 Leyi Rong
2021-03-24 10:40 ` Coyle, David [this message]
2021-03-25  7:56   ` Zhang, Qi Z

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