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Tue, 22 Jun 2021 06:07:50 +0000 From: "Xing, Beilei" To: Feifei Wang CC: "dev@dpdk.org" , "nd@arm.com" , Ruifeng Wang Thread-Topic: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx Thread-Index: AQHXUtDMT6XUJN6AikyQLma0d2l2O6sfsZ2A Date: Tue, 22 Jun 2021 06:07:50 +0000 Message-ID: References: <20210527081714.1367611-1-feifei.wang2@arm.com> <20210527081714.1367611-2-feifei.wang2@arm.com> In-Reply-To: <20210527081714.1367611-2-feifei.wang2@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.55.46.52] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: ef1b053a-e6d2-4e2a-2590-08d9354410c5 x-ms-traffictypediagnostic: MN2PR11MB4517: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7219; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: zlQBFIi2bY04mZav59y3PYU45eE/lnpUk7KMWmMZPv0p21v0hwligA9njwGjcPZAxAsGCc7jvS86YT2QRSMP332yiEiLzrUZNmBObMjdMHRY8wd1PNIRdxAc7XtFZvb9U40+WpZYoVFCwz3Sivo/gsVoJchqdMBY7Nxo5+GAYHjC2DwTKtVUCA9fVYNr/Rzqxru6DnbhzFTTMUhq9OPOmdGVBzT0sMvJ2PF8xtVBG7jIQSwXCo/qfPqD8p7gq/ITu33kzHim78OeOJKaPKIZBhG4CzCIARiDv3lCzm0+nKi0Heu+KNN5ysJb4nhkx/fg7RqrK4vC3wjdrn6QkiwsFpsnpXvTXIw4E2L9NiBapkdlm7dnfKzLaparyqG8ukfDTBt0LTRw0w8mCu+4VzBhFkN3n3HJoBDhx8A5xZDz71mx8NSDx1FqrWMR+T/tK5Pr8CKbvC/Pt1ix73J8YlU9+bhMG9O6Ro89gvaCcl+nedqB8J/9DuoewvoSfEZlhw+iOb8N5L6TNH8s/YwKF/GpDeeihwYvHT6Cz43CyOoSfd9GnhSMpv8eOl7TDYprreldKIN17qiVk9EVew8AKzDpBnJW9raB5vXCYSuSJqebRkC3Rc4kXGnzmLysFgKlMNATMe3jmJR8g0LYFNFcg0cAG/1sdgfBgbwx5lR7C1OsUQNRdOaXww4YsUiLHVkD0Wxy x-forefront-antispam-report: CIP:255.255.255.255; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN2PR11MB3807.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ef1b053a-e6d2-4e2a-2590-08d9354410c5 X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Jun 2021 06:07:50.4470 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 9Pqx5ybtcR8c2wVIi5Ur71nkY6Re4RYFgi7sjjdhZxvRTpaLJQvM7zNzke3fQc89hlBVSNMbliDw6q0SHwRzkg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB4517 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v1 1/2] net/i40e: improve performance for scalar Tx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Feifei Wang > Sent: Thursday, May 27, 2021 4:17 PM > To: Xing, Beilei > Cc: dev@dpdk.org; nd@arm.com; Feifei Wang ; > Ruifeng Wang > Subject: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx >=20 > For i40e scalar Tx path, if implement FAST_FREE_MBUF mode, it means per- > queue all mbufs come from the same mempool and have refcnt =3D 1. >=20 > Thus we can use bulk free of the buffers when mbuf fast free mode is > enabled. >=20 > For scalar path in arm platform: > In n1sdp, performance is improved by 7.8%; In thunderx2, performance is > improved by 6.7%. >=20 > For scalar path in x86 platform, > performance is improved by 6%. >=20 > Suggested-by: Ruifeng Wang > Signed-off-by: Feifei Wang > --- > drivers/net/i40e/i40e_rxtx.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c = index > 6c58decece..fe7b20f750 100644 > --- a/drivers/net/i40e/i40e_rxtx.c > +++ b/drivers/net/i40e/i40e_rxtx.c > @@ -1295,6 +1295,7 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq) { > struct i40e_tx_entry *txep; > uint16_t i; > + struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ]; >=20 > if ((txq->tx_ring[txq->tx_next_dd].cmd_type_offset_bsz & > rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) !=3D > @@ -1308,9 +1309,11 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq) >=20 > if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) { > for (i =3D 0; i < txq->tx_rs_thresh; ++i, ++txep) { > - rte_mempool_put(txep->mbuf->pool, txep->mbuf); > + free[i] =3D txep->mbuf; The tx_rs_thresh can be 'nb_desc - 3', so if tx_rs_thres > RTE_I40E_TX_MAX_= FREE_BUF_SZ, there'll be out of bounds, right? > txep->mbuf =3D NULL; > } > + rte_mempool_put_bulk(free[0]->pool, (void **)free, > + txq->tx_rs_thresh); > } else { > for (i =3D 0; i < txq->tx_rs_thresh; ++i, ++txep) { > rte_pktmbuf_free_seg(txep->mbuf); > -- > 2.25.1