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Thu, 21 Jan 2021 17:10:39 +0000 From: Matan Azrad To: Tal Shnaiderman , "dev@dpdk.org" CC: NBU-Contact-Thomas Monjalon , Ashish Gupta , Fiona Trahe , "akhil.goyal@nxp.com" Thread-Topic: [dpdk-dev] [PATCH v3 01/11] common/mlx5: add DevX attributes for compress Thread-Index: AQHW7x+eYrNL1B4aWk2C0rPQiYUJWKoyTUMAgAAEg5A= Date: Thu, 21 Jan 2021 17:10:39 +0000 Message-ID: References: <1610554690-411627-1-git-send-email-matan@nvidia.com> <1611142175-409485-1-git-send-email-matan@nvidia.com> <1611142175-409485-2-git-send-email-matan@nvidia.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: nvidia.com; dkim=none (message not signed) header.d=none;nvidia.com; dmarc=none action=none header.from=nvidia.com; x-originating-ip: [216.228.117.190] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: a0ac9ed9-2e6a-42ae-5ef3-08d8be2f7a59 x-ms-traffictypediagnostic: MWHPR12MB1711: x-ld-processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5236; 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b=ajBSCqpaUUbEwc9CDWdFR301bQvotE4nrTa2SoEoKv1Ld2PDTTFumkW/28K5t7oyb OV5kA3mv0u+87AqihUFuHs7Ur2LeP80lB2Ol7bqM3XWzSLum3MHSWwRGCt9tuqBNTl DfXDPN9ewjl/VegvyRa4ugxd0PQS4HDQmJOBe/KB7B0qxG0gTWMEzxNRpy7yQNSO0d FdeyGi7kMjHZEX1fhm7RqXFTwxj+OhMZ2wzJXx9Rps76EhL2N4slLKoI/4ZZQIyWh+ Y0QMNOk071sjDCKbEexCRYTCXvjFG9ftBU/Rehv+PL6KygSOQCwcKfRnEs83AK3Owl gSjrpksoP3SUQ== Subject: Re: [dpdk-dev] [PATCH v3 01/11] common/mlx5: add DevX attributes for compress X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Tal Shnaiderman > Sent: Thursday, January 21, 2021 6:52 PM > To: Matan Azrad ; dev@dpdk.org > Cc: NBU-Contact-Thomas Monjalon ; Ashish Gupta > ; Fiona Trahe ; > akhil.goyal@nxp.com > Subject: RE: [dpdk-dev] [PATCH v3 01/11] common/mlx5: add DevX attributes > for compress >=20 > > Subject: [dpdk-dev] [PATCH v3 01/11] common/mlx5: add DevX attributes > > for compress > > > > Add the DevX attributes for compress related engines: > > - compress > > - decompress > > - dma > > > > Signed-off-by: Matan Azrad > > Acked-by: Viacheslav Ovsiienko > > --- > > drivers/common/mlx5/mlx5_devx_cmds.c | 10 ++++++++++ > > drivers/common/mlx5/mlx5_devx_cmds.h | 7 +++++++ > > drivers/common/mlx5/mlx5_prm.h | 18 ++++++++++++++++-- > > 3 files changed, 33 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c > > b/drivers/common/mlx5/mlx5_devx_cmds.c > > index d5859c2..33acd73 100644 > > --- a/drivers/common/mlx5/mlx5_devx_cmds.c > > +++ b/drivers/common/mlx5/mlx5_devx_cmds.c > > @@ -732,6 +732,16 @@ struct mlx5_devx_obj * > > attr->log_max_pd =3D MLX5_GET(cmd_hca_cap, hcattr, log_max_pd); > > attr->log_max_srq =3D MLX5_GET(cmd_hca_cap, hcattr, log_max_srq); > > attr->log_max_srq_sz =3D MLX5_GET(cmd_hca_cap, hcattr, > > log_max_srq_sz); > > + attr->mmo_dma_en =3D MLX5_GET(cmd_hca_cap, hcattr, dma_mmo); > > + attr->mmo_compress_en =3D MLX5_GET(cmd_hca_cap, hcattr, > > compress); > > + attr->mmo_decompress_en =3D MLX5_GET(cmd_hca_cap, hcattr, > > decompress); > > + attr->compress_min_block_size =3D MLX5_GET(cmd_hca_cap, hcattr, > > + compress_min_block_size); > > + attr->log_max_mmo_dma =3D MLX5_GET(cmd_hca_cap, hcattr, > > log_dma_mmo_size); > > + attr->log_max_mmo_compress =3D MLX5_GET(cmd_hca_cap, hcattr, > > + log_compress_mmo_size); > > + attr->log_max_mmo_decompress =3D MLX5_GET(cmd_hca_cap, > > hcattr, > > + log_decompress_mmo_size); > > if (attr->qos.sup) { > > MLX5_SET(query_hca_cap_in, in, op_mod, > > MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP | diff --git > > a/drivers/common/mlx5/mlx5_devx_cmds.h > > b/drivers/common/mlx5/mlx5_devx_cmds.h > > index bf83a90..696a981 100644 > > --- a/drivers/common/mlx5/mlx5_devx_cmds.h > > +++ b/drivers/common/mlx5/mlx5_devx_cmds.h > > @@ -130,6 +130,13 @@ struct mlx5_hca_attr { > > uint32_t log_max_srq; > > uint32_t log_max_srq_sz; > > uint32_t rss_ind_tbl_cap; > > + uint32_t mmo_dma_en:1; > > + uint32_t mmo_compress_en:1; > > + uint32_t mmo_decompress_en:1; > > + uint32_t compress_min_block_size:4; > > + uint32_t log_max_mmo_dma:5; > > + uint32_t log_max_mmo_compress:5; > > + uint32_t log_max_mmo_decompress:5; > > }; > > > > struct mlx5_devx_wq_attr { > > diff --git a/drivers/common/mlx5/mlx5_prm.h > > b/drivers/common/mlx5/mlx5_prm.h index c9eba22..72c843f 100644 > > --- a/drivers/common/mlx5/mlx5_prm.h > > +++ b/drivers/common/mlx5/mlx5_prm.h > > @@ -1127,7 +1127,15 @@ enum { > > struct mlx5_ifc_cmd_hca_cap_bits { > > u8 reserved_at_0[0x30]; > > u8 vhca_id[0x10]; > > - u8 reserved_at_40[0x40]; > > + u8 reserved_at_40[0x20]; > > + u8 reserved_at_60[0x3]; > > + u8 log_regexp_scatter_gather_size[0x5]; > > + u8 reserved_at_68[0x3]; > > + u8 log_dma_mmo_size[5]; > > + u8 reserved_at_70[0x3]; > > + u8 log_compress_mmo_size[5]; > > + u8 reserved_at_78[0x3]; > > + u8 log_decompress_mmo_size[5]; >=20 > Small comment, PRM bit array size is always defined in hex format. >=20 > > u8 log_max_srq_sz[0x8]; > > u8 log_max_qp_sz[0x8]; > > u8 reserved_at_90[0x9]; > > @@ -1175,7 +1183,13 @@ struct mlx5_ifc_cmd_hca_cap_bits { > > u8 log_max_ra_res_dc[0x6]; > > u8 reserved_at_140[0xa]; > > u8 log_max_ra_req_qp[0x6]; > > - u8 reserved_at_150[0xa]; > > + u8 rtr2rts_qp_counters_set_id[1]; > > + u8 rts2rts_udp_sport[1]; > > + u8 rts2rts_lag_tx_port_affinity[1]; > > + u8 dma_mmo[1]; > > + u8 compress_min_block_size[4]; > > + u8 compress[1]; > > + u8 decompress[1]; >=20 > Same. >=20 > > u8 log_max_ra_res_qp[0x6]; > > u8 end_pad[0x1]; > > u8 cc_query_allowed[0x1]; > > -- > > 1.8.3.1 Yes, not look urgent, Akhil let me know if you can take it in integration o= r need to send more version for all the series because of it.