RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration

[Vamsi Krishna Attunuru <vattunuru@marvell.com>]

>-----Original Message-----
>From: Anoob Joseph <anoobj@marvell.com>
>Sent: Thursday, October 3, 2024 6:37 PM
>To: Vamsi Krishna Attunuru <vattunuru@marvell.com>;
>thomas@monjalon.net; fengchengwen@huawei.com;
>bruce.richardson@intel.com; mb@smartsharesystems.com
>Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marvell.com>;
>conor.walsh@intel.com; Gowrishankar Muthukrishnan
><gmuthukrishn@marvell.com>; Vidya Sagar Velumuri
><vvelumuri@marvell.com>; g.singh@nxp.com; sachin.saxena@oss.nxp.com;
>hemant.agrawal@nxp.com; Vamsi Krishna Attunuru
><vattunuru@marvell.com>; Amit Prakash Shukla
><amitprakashs@marvell.com>
>Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority
>configuration
>
>Hi Vamsi,
>
>Looks good overall. Minor nit inline.
>
>With the change, Acked-by: Anoob Joseph <anoobj@marvell.com>
>
>Thanks,
>Anoob
>
>> From: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>>
>> Some DMA controllers offer the ability to configure priority level for
>> the hardware command queues, allowing for the prioritization of DMA
>> command execution based on queue importance.
>>
>> This patch introduces the necessary fields in the dmadev structures to
>> retrieve information about the hardware-supported priority levels and
>> to enable priority configuration from the application.
>>
>> Signed-off-by: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>> Signed-off-by: Amit Prakash Shukla <mailto:amitprakashs@marvell.com>
>> ---
>> V4 changes:
>> * Rebased onto the latest
>>
>> V3 changes:
>> * Corrected patch title
>>
>> V2 changes:
>> * Reverted removed text from release_24_11.rst
>>
>> V1 changes:
>> * Added trace support
>> * Added new capability flag
>>
>> Deprecation notice:
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__patches.dpdk.org_
>> project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-
>40marvell
>>
>.com_&d=DwIDAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8rwwviRSxyLWs2n6
>B-WYLn1v
>> 9SyTMrT5EQqh2TU&m=c22fMFIKeJe1DOrgulUnP_Vx8GS88rJvSiL6g5m-
>mXf6ioWKtTZo
>> gLVQGhFkAnTS&s=PqF7gt7H7PoC8EZjxdhed4aH7gqUS-qNKx0oKgCqorE&e=
>>
>> * Assuming we do not anticipate any advanced scheduling schemes for
>> dmadev queues,  this patch is intended to support a strict priority scheme.
>>
>> doc/guides/rel_notes/release_24_11.rst |  8 ++++++++
>> lib/dmadev/rte_dmadev.c                | 15 +++++++++++++++
>> lib/dmadev/rte_dmadev.h                | 21 +++++++++++++++++++++
>> lib/dmadev/rte_dmadev_trace.h          |  2 ++
>> 4 files changed, 46 insertions(+)
>>
>
><snip>
>
>> --- a/lib/dmadev/rte_dmadev.h
>> +++ b/lib/dmadev/rte_dmadev.h
>> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);
>> #define RTE_DMA_CAPA_OPS_COPY_SG	RTE_BIT64(33)
>> /** Support fill operation. */
>> #define RTE_DMA_CAPA_OPS_FILL		RTE_BIT64(34)
>> +/** Support strict prioritization at DMA HW channel level
>> + *
>> + * If device supports HW channel prioritization then application
>> +could
>> + * assign fixed priority to the DMA HW channel using 'priority' field
>> +in
>
>[Anoob] Do we need to mention HW? Should we just use "DMA channel"?
>Here and in other places.

[vamsi] It's mainly to differentiate between vchan(kind of sw channel) and hw channel.

>
>> + * struct rte_dma_conf. Number of supported priority levels will be
>> + known
>> + * from 'nb_priorities' field in struct rte_dma_info.
>> + *
>> + * DMA devices which support prioritization can advertise this capability.
>> + */