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Thu, 3 Oct 2024 13:31:49 +0000 From: Vamsi Krishna Attunuru To: Vamsi Krishna Attunuru , Anoob Joseph , "thomas@monjalon.net" , "fengchengwen@huawei.com" , "bruce.richardson@intel.com" , "mb@smartsharesystems.com" CC: "dev@dpdk.org" , Jerin Jacob , Amit Prakash Shukla Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration Thread-Topic: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configuration Thread-Index: AQHbFYrvgWkDEJEtjkGkzagmVoFHC7J0/zIAgAAAsvCAAAU3oA== Date: Thu, 3 Oct 2024 13:31:49 +0000 Message-ID: References: <20241003114133.1356496-1-vattunuru@marvell.com> <20241003115347.1365370-1-vattunuru@marvell.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MW4PR18MB5244:EE_|PH0PR18MB5071:EE_ x-ms-office365-filtering-correlation-id: 59ebd5a4-728c-4655-1c8e-08dce3afbc15 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Hi Feng, Could you review V4 and let me know if it=E2=80=99s ready to be acked or if= any changes are needed. Regards Vamsi From: Vamsi Krishna Attunuru Sent: Thursday, October 3, 2024 6:46 PM To: Anoob Joseph ; thomas@monjalon.net; fengchengwen@hu= awei.com; bruce.richardson@intel.com; mb@smartsharesystems.com Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob ; = conor.walsh@intel.com; Gowrishankar Muthukrishnan ; Vidya Sagar Velumuri ; g.singh@nxp.com; sachin.sa= xena@oss.nxp.com; hemant.agrawal@nxp.com; Amit Prakash Shukla Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority configurati= on >-----Original Message----- >From: Anoob Joseph >Sent: Thursday, October 3, 2024 6:=E2=80=8A37 PM >To: Vamsi = Krishna Attunuru ; >thomas@=E2=80= =8Amonjalon.=E2=80=8Anet; fengchengwen@=E2=80=8Ahuawei.=E2=80=8Acom; >bruce= .=E2=80=8Arichardson@=E2=80=8Aintel.=E2=80=8Acom; >-----Original Message----- >From: Anoob Joseph > >Sent: Thursday, October 3, 2024 6:37 PM >To: Vamsi Krishna Attunuru >; >thomas@monjalon.net; fengchengwen@huawei.com; >bruce.richardson@intel.com; mb@smartsha= resystems.com >Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob >; >conor.walsh@intel.com; Gowrishankar Muthukri= shnan >>; Vidya Sagar V= elumuri >>; g.singh@nxp.com; sachin.saxena@oss.nxp.com; >hemant.agrawal@nxp.com; Vamsi Krishna Attun= uru >>; Amit Prakash Shukla >> >Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority >configuration > >Hi Vamsi, > >Looks good overall. Minor nit inline. > >With the change, Acked-by: Anoob Joseph > > >Thanks, >Anoob > >> From: Vamsi Attunuru >> >> Some DMA controllers offer the ability to configure priority level for >> the hardware command queues, allowing for the prioritization of DMA >> command execution based on queue importance. >> >> This patch introduces the necessary fields in the dmadev structures to >> retrieve information about the hardware-supported priority levels and >> to enable priority configuration from the application. >> >> Signed-off-by: Vamsi Attunuru >> Signed-off-by: Amit Prakash Shukla >> --- >> V4 changes: >> * Rebased onto the latest >> >> V3 changes: >> * Corrected patch title >> >> V2 changes: >> * Reverted removed text from release_24_11.rst >> >> V1 changes: >> * Added trace support >> * Added new capability flag >> >> Deprecation notice: >> https://urldefense.proofpoint.com/v2/url?u=3Dhttps-3A__patches.dpdk.org_= >>project_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs- >40marvell >> >.com_&d=3DDwIDAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3DjPfB8rwwviRSxyLWs2n6 >B-WYLn1v >> 9SyTMrT5EQqh2TU&m=3Dc22fMFIKeJe1DOrgulUnP_Vx8GS88rJvSiL6g5m- >mXf6ioWKtTZo >> gLVQGhFkAnTS&s=3DPqF7gt7H7PoC8EZjxdhed4aH7gqUS-qNKx0oKgCqorE&e=3D >> >> * Assuming we do not anticipate any advanced scheduling schemes for >> dmadev queues, this patch is intended to support a strict priority sche= me. >> >> doc/guides/rel_notes/release_24_11.rst | 8 ++++++++ >> lib/dmadev/rte_dmadev.c | 15 +++++++++++++++ >> lib/dmadev/rte_dmadev.h | 21 +++++++++++++++++++++ >> lib/dmadev/rte_dmadev_trace.h | 2 ++ >> 4 files changed, 46 insertions(+) >> > > > >> --- a/lib/dmadev/rte_dmadev.h >> +++ b/lib/dmadev/rte_dmadev.h >> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_dev_id); >> #define RTE_DMA_CAPA_OPS_COPY_SG RTE_BIT64(33) >> /** Support fill operation. */ >> #define RTE_DMA_CAPA_OPS_FILL RTE_BIT64(34) >> +/** Support strict prioritization at DMA HW channel level >> + * >> + * If device supports HW channel prioritization then application >> +could >> + * assign fixed priority to the DMA HW channel using 'priority' field >> +in > >[Anoob] Do we need to mention HW? Should we just use "DMA channel"? >Here and in other places. [vamsi] It's mainly to differentiate between vchan(kind of sw channel) and = hw channel. > >> + * struct rte_dma_conf. Number of supported priority levels will be >> + known >> + * from 'nb_priorities' field in struct rte_dma_info. >> + * >> + * DMA devices which support prioritization can advertise this capabili= ty. >> + */ --_000_MW4PR18MB5244FC80F354DE5846B3C0C0A6712MW4PR18MB5244namp_ Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable

Hi Feng,=

 

Could you review V4= and let me know if it=E2=80=99s ready to be acked or if any changes are ne= eded.

 

Regards<= /span>

Vamsi

 

From:= Vamsi Krishna Attunuru <vattunuru@marv= ell.com>
Sent: Thursday, October 3, 2024 6:46 PM
To: Anoob Joseph <anoobj@marvell.com>; thomas@monjalon.net; fe= ngchengwen@huawei.com; bruce.richardson@intel.com; mb@smartsharesystems.com=
Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marv= ell.com>; conor.walsh@intel.com; Gowrishankar Muthukrishnan <gmuthukr= ishn@marvell.com>; Vidya Sagar Velumuri <vvelumuri@marvell.com>; g= .singh@nxp.com; sachin.saxena@oss.nxp.com; hemant.agrawal@nxp.com; Amit Prakash Shukla <amitprakashs@marvell.com>
Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority conf= iguration

 

>-----Original Message----- >From: Anoob = Joseph <anoobj@=E2=80=8Amarvell.=E2=80=8Acom> >Sent: Thursday, Oct= ober 3, 2024 6:=E2=80=8A37 PM >To: Vamsi Krishna Attunuru <vattunuru@= =E2=80=8Amarvell.=E2=80=8Acom>; >thomas@=E2=80=8Amonjalon.=E2=80=8Anet; fengchengwen@=E2=80=8Ahuawei.= =E2=80=8Acom; >bruce.=E2=80=8Arichardson@=E2=80=8Aintel.=E2=80=8Acom;

 
 
>-----Original Message-----
>From: Anoob Joseph <anoobj=
@marvell.com>
>Sent: Thursday, October 3, 2024 6:37 PM
>To: Vamsi Krishna Attunuru <vattunuru@marvell.com>;
>thomas@monjalon.net; fengchengwen@huawei.com;
>bruce.richardson@inte=
l.com; mb@smartsharesystems=
.com
>Cc: dev@dpdk.org; kevin.laatz@intel.com; Jerin Jacob <jerinj@marvell.com>;
>conor.walsh@intel.com;=
 Gowrishankar Muthukrishnan
><gmuthukrishn@marvel=
l.com>; Vidya Sagar Velumuri
><vvelumuri@marvell.com<=
/a>>; g.singh@nxp.com; sachin.saxena@oss.nxp.com;
>hemant.agrawal@nxp.com; Vamsi Krishna Attunuru
><vattunuru@marvell.com<=
/a>>; Amit Prakash Shukla
><amitprakashs@marvel=
l.com>
>Subject: RE: [EXTERNAL] [PATCH v4 1/1] dmadev: support priority
>configuration
> 
>Hi Vamsi,
> 
>Looks good overall. Minor nit inline.
> 
>With the change, Acked-by: Anoob Joseph <anoobj@marvell.com>
> 
>Thanks,
>Anoob
> 
>> From: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>> 
>> Some DMA controllers offer the ability to configure priority l=
evel for
>> the hardware command queues, allowing for the prioritization o=
f DMA
>> command execution based on queue importance.=

>> 
>> This patch introduces the necessary fields in the dmadev struc=
tures to
>> retrieve information about the hardware-supported priority lev=
els and
>> to enable priority configuration from the application.
>> 
>> Signed-off-by: Vamsi Attunuru <mailto:vattunuru@marvell.com>
>> Signed-off-by: Amit Prakash Shukla <mailto:amitprakashs@marvell.com>
>> ---
>> V4 changes:
>> * Rebased onto the latest
>> 
>> V3 changes:
>> * Corrected patch title
>> 
>> V2 changes:
>> * Reverted removed text from release_24_11.rst
>> 
>> V1 changes:
>> * Added trace support
>> * Added new capability flag
>> 
>> Deprecation notice:
>> https://urldefense.proofpoint.com/v2/url?u=3Dh=
ttps-3A__patches.dpdk.org_
>>=
p=
roject_dpdk_patch_20240730144612.2132848-2D1-2Damitprakashs-
>40marvell
>> 
>.com_&d=3DDwIDAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3DjPfB8rw=
wviRSxyLWs2n6
>B-WYLn1v
>> 9SyTMrT5EQqh2TU&m=3Dc22fMFIKeJe1DOrgulUnP_Vx8GS88rJvSiL6g5=
m-
>mXf6ioWKtTZo
>> gLVQGhFkAnTS&s=3DPqF7gt7H7PoC8EZjxdhed4aH7gqUS-qNKx0oKgCqo=
rE&e=3D
>> 
>> * Assuming we do not anticipate any advanced scheduling scheme=
s for
>> dmadev queues,  this patch is intended to support a stric=
t priority scheme.
>> 
>> doc/guides/rel_notes/release_24_11.rst |  8 ++++++++=

>> lib/dmadev/rte_dmadev.c      &nb=
sp;         | 15 +++++++++++++++
>> lib/dmadev/rte_dmadev.h      &nb=
sp;         | 21 ++++++++++++++++++=
+++
>> lib/dmadev/rte_dmadev_trace.h     &nb=
sp;    |  2 ++
>> 4 files changed, 46 insertions(+)
>> 
> 
><snip>
> 
>> --- a/lib/dmadev/rte_dmadev.h
>> +++ b/lib/dmadev/rte_dmadev.h
>> @@ -268,6 +268,16 @@ int16_t rte_dma_next_dev(int16_t start_de=
v_id);
>> #define RTE_DMA_CAPA_OPS_COPY_SG     =
       RTE_BIT64(33)
>> /** Support fill operation. */
>> #define RTE_DMA_CAPA_OPS_FILL     &nb=
sp;            =
    RTE_BIT64(34)
>> +/** Support strict prioritization at DMA HW channel level
>> + *
>> + * If device supports HW channel prioritization then applicat=
ion
>> +could
>> + * assign fixed priority to the DMA HW channel using 'priorit=
y' field
>> +in
> 
>[Anoob] Do we need to mention HW? Should we just use "DMA chan=
nel"?
>Here and in other places.
 
[vamsi] It's mainly to differentiate between vchan(kind of sw channel) =
and hw channel.
 
> 
>> + * struct rte_dma_conf. Number of supported priority levels w=
ill be
>> + known
>> + * from 'nb_priorities' field in struct rte_dma_info.
>> + *
>> + * DMA devices which support prioritization can advertise thi=
s capability.
>> + */
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