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charset="Windows-1252" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MW5PR11MB5809.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8db7cc84-ff7d-4635-db3e-08da54f5d6d5 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Jun 2022 08:53:27.3781 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: V+sfZYwgbo51yn6Y2imylpCJLmMciA6uwool0JF7wUuhenvonc/NYtKL2ejb0vcAkGMbElqkigCHNrH0aslSig== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN0PR11MB5760 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi, Yes you are right -=20 Maybe with this way? #if defined(RTE_ARCH_ARM64) vector_mode =3D IPSEC_MB_ARM64; #elif defined(RTE_ARCH_X86_64) if (vector_mode =3D=3D IPSEC_MB_NOT_SUPPORTED) { /* Check CPU for supported vector instruction set */ if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) vector_mode =3D IPSEC_MB_AVX512; else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) vector_mode =3D IPSEC_MB_AVX2; else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX)) vector_mode =3D IPSEC_MB_AVX; else vector_mode =3D IPSEC_MB_SSE; #else /* error return */ #endif The only reason I suggest this is to avoid forgetting why it is implemented= this way in the future... Regards, Fan > -----Original Message----- > From: Ashwin Sekhar Thalakalath Kottilveetil > Sent: Tuesday, June 21, 2022 7:38 AM > To: Zhang, Roy Fan ; dev@dpdk.org > Cc: Jerin Jacob Kollanukkaran ; Sunil Kumar Kori > ; Satha Koteswara Rao Kottidi > ; Pavan Nikhilesh Bhagavatula > ; Kiran Kumar Kokkilagadda > ; Satheesh Paul Antonysamy > ; Anoob Joseph ; Akhil Goyal > ; Harman Kalra ; Nithin Kumar > Dabilpuram ; De Lara Guarch, Pablo > > Subject: RE: [PATCH] crypto/ipsec_mb: enable compilation for non x86 arch >=20 > Hi Fan, >=20 > Thanks for the suggestion. However that will not work for ARM64. >=20 > Please note that the #defines RTE_CPUFLAG_AVX512F, RTE_CPUFLAG_AVX2 > and RTE_CPUFLAG_AVX are not available for ARM64. So the compilation will > break. >=20 > I can introduce IPSEC_MB_ARM64, but still the current branch needs to be > completely wrapped under #ifdef to avoid compilation failure. >=20 > Does the below code look OK ? >=20 > if (vector_mode =3D=3D IPSEC_MB_NOT_SUPPORTED) { > #if defined(RTE_ARCH_X86_64) > /* Check CPU for supported vector instruction set */ > if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) > vector_mode =3D IPSEC_MB_AVX512; > else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) > vector_mode =3D IPSEC_MB_AVX2; > else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX)) > vector_mode =3D IPSEC_MB_AVX; > else > vector_mode =3D IPSEC_MB_SSE; > #elif defined(RTE_ARCH_ARM64) > vector_mode =3D IPSEC_MB_ARM64; > #else > /* error return */ > #endif > } >=20 > Ashwin Sekhar T K >=20 > > -----Original Message----- > > From: Zhang, Roy Fan > > Sent: Monday, June 20, 2022 7:10 PM > > To: Ashwin Sekhar Thalakalath Kottilveetil ; > > dev@dpdk.org > > Cc: Jerin Jacob Kollanukkaran ; Sunil Kumar Kori > > ; Satha Koteswara Rao Kottidi > > ; Pavan Nikhilesh Bhagavatula > > ; Kiran Kumar Kokkilagadda > > ; Satheesh Paul Antonysamy > > ; Anoob Joseph ; Akhil > > Goyal ; Harman Kalra ; Nithin > > Kumar Dabilpuram ; De Lara Guarch, Pablo > > > > Subject: [EXT] RE: [PATCH] crypto/ipsec_mb: enable compilation for non = x86 > > arch > > > > External Email > > > > ---------------------------------------------------------------------- > > Hi, > > > > Thank you for the explanation. > > In that case I'd suggest instead of warping the branches completely wit= h > > macro, wrapping on the last "else" instead. > > Something like > > > > if (vector_mode =3D=3D IPSEC_MB_NOT_SUPPORTED) { > > /* Check CPU for supported vector instruction set */ > > if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) > > vector_mode =3D IPSEC_MB_AVX512; > > else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) > > vector_mode =3D IPSEC_MB_AVX2; > > else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX)) > > vector_mode =3D IPSEC_MB_AVX; > > else > > #ifdef RTE_ARCH_X86_64 > > vector_mode =3D IPSEC_MB_SSE; > > #elif RTE_ARCH_ARM64 ? > > Vector_mode =3D IPSEC_MB_ARM64; /* newly > > introduced ARM vector mode */ #else > > /* error return */ > > #endif > > } > > > > This should also help setting RTE_CRYPTODEV_FF_CPU_ARM_CE in device > > feature flag bitmap later. > > > > Regards, > > Fan > > > > > -----Original Message----- > > > From: Ashwin Sekhar Thalakalath Kottilveetil > > > Sent: Friday, June 17, 2022 11:34 AM > > > To: Zhang, Roy Fan ; dev@dpdk.org > > > Cc: Jerin Jacob Kollanukkaran ; Sunil Kumar Kori > > > ; Satha Koteswara Rao Kottidi > > > ; Pavan Nikhilesh Bhagavatula > > > ; Kiran Kumar Kokkilagadda > > > ; Satheesh Paul Antonysamy > > > ; Anoob Joseph ; Akhil > > > Goyal ; Harman Kalra ; Nithin > > > Kumar Dabilpuram > > > Subject: RE: [PATCH] crypto/ipsec_mb: enable compilation for non x86 > > > arch > > > > > > Hi Fan, > > > > > > There is an ARM64 port for IPSEC-MB > > > https://urldefense.proofpoint.com/v2/url?u=3Dhttps- > > 3A__gitlab.arm.com_ar > > > m-2Dreference-2D&d=3DDwIF-g&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3DpYk- > > QOhvnkU-_75y0 > > > > > NKSn535ZotEGI_E69Py3Ppondk&m=3DhJ5ewsPh0KMcvMFylomkCk_hiNsuTm- > > HfHad1UoQy > > > K7MHqUyXvJSwSgyAQQThWyj&s=3DmL8bOzY63JQ- > > 6CBhruqHv9bE5sEWT5PfXRFv4zbI6mw& > > > e=3D > > > solutions/ipsec-mb . > > > > > > When we compile DPDK with this IPSEC-MB port for ARM64, the > > > vector_mode value doesn't matter. > > > > > > And the cpuflag #defines RTE_CPUFLAG_AVX512F, RTE_CPUFLAG_AVX2 > > etc. > > > are not available in ARM64. So these need to be made x86 specific. > > > > > > Thank you > > > Ashwin > > > > > > Ashwin Sekhar T K > > > > > > > -----Original Message----- > > > > From: Zhang, Roy Fan > > > > Sent: Friday, June 17, 2022 3:53 PM > > > > To: Ashwin Sekhar Thalakalath Kottilveetil ; > > > > dev@dpdk.org > > > > Cc: Jerin Jacob Kollanukkaran ; Sunil Kumar Kor= i > > > > ; Satha Koteswara Rao Kottidi > > > > ; Pavan Nikhilesh Bhagavatula > > > > ; Kiran Kumar Kokkilagadda > > > > ; Satheesh Paul Antonysamy > > > > ; Anoob Joseph ; > > Akhil > > > > Goyal ; Harman Kalra ; > > > > Nithin Kumar Dabilpuram > > > > Subject: [EXT] RE: [PATCH] crypto/ipsec_mb: enable compilation for > > > > non x86 arch > > > > > > > > External Email > > > > > > > > -------------------------------------------------------------------= - > > > > -- > > > > Hi, > > > > > > > > IPsec-mb PMD should not be built at all if the library is not insta= lled. > > > > Also, the code you are warping with macro only prevents initializin= g > > > > the vector mode param to SSE which is later used to add feature fla= g > > > > bits. To me this change does not make much sense. > > > > Can you share with me the purpose of this change? > > > > > > > > Regards, > > > > Fan > > > > > > > > > -----Original Message----- > > > > > From: Ashwin Sekhar T K > > > > > Sent: Friday, June 10, 2022 5:21 PM > > > > > To: dev@dpdk.org > > > > > Cc: jerinj@marvell.com; skori@marvell.com; skoteshwar@marvell.com= ; > > > > > pbhagavatula@marvell.com; kirankumark@marvell.com; > > > > > psatheesh@marvell.com; asekhar@marvell.com; anoobj@marvell.com; > > > > > gakhil@marvell.com; hkalra@marvell.com; ndabilpuram@marvell.com > > > > > Subject: [PATCH] crypto/ipsec_mb: enable compilation for non x86 > > > > > arch > > > > > > > > > > Enable compilation for non x86 architectures by conditionally > > > > > compiling x86 specific code. > > > > > > > > > > Signed-off-by: Ashwin Sekhar T K > > > > > --- > > > > > drivers/crypto/ipsec_mb/ipsec_mb_private.c | 2 ++ > > > > > 1 file changed, 2 insertions(+) > > > > > > > > > > diff --git a/drivers/crypto/ipsec_mb/ipsec_mb_private.c > > > > > b/drivers/crypto/ipsec_mb/ipsec_mb_private.c > > > > > index aab42c360c..9ea1110aaf 100644 > > > > > --- a/drivers/crypto/ipsec_mb/ipsec_mb_private.c > > > > > +++ b/drivers/crypto/ipsec_mb/ipsec_mb_private.c > > > > > @@ -53,6 +53,7 @@ ipsec_mb_create(struct rte_vdev_device *vdev, > > > > > const char *name, *args; > > > > > int retval; > > > > > > > > > > +#ifdef RTE_ARCH_X86_64 > > > > > if (vector_mode =3D=3D IPSEC_MB_NOT_SUPPORTED) { > > > > > /* Check CPU for supported vector instruction set */ > > > > > if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) > > > > > @@ -64,6 +65,7 @@ ipsec_mb_create(struct rte_vdev_device *vdev, > > > > > else > > > > > vector_mode =3D IPSEC_MB_SSE; > > > > > } > > > > > +#endif > > > > > > > > > > init_params.private_data_size =3D sizeof(struct > > > > ipsec_mb_dev_private) + > > > > > pmd_data->internals_priv_size; > > > > > -- > > > > > 2.25.1