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Mon, 10 Oct 2016 17:05:30 +0000 From: Vladyslav Buslov To: "Wu, Jingjing" , "Yigit, Ferruh" , "Zhang, Helin" CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH] net/i40e: add additional prefetch instructions for bulk rx Thread-Index: AQHSDoto1p5CkxHiFkqgnkKWcmK4QKCh1pSAgAAeNcA= Date: Mon, 10 Oct 2016 17:05:30 +0000 Message-ID: References: <20160714172719.17502-1-vladyslav.buslov@harmonicinc.com> <20160714172719.17502-2-vladyslav.buslov@harmonicinc.com> <18156776-3658-a97d-3fbc-19c1a820a04d@intel.com> <9BB6961774997848B5B42BEC655768F80E277DFC@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <9BB6961774997848B5B42BEC655768F80E277DFC@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Vladyslav.Buslov@harmonicinc.com; x-originating-ip: [95.67.66.62] x-ms-office365-filtering-correlation-id: 96db2644-c8a9-40af-67a3-08d3f12fa3dd x-microsoft-exchange-diagnostics: 1; MWHPR11MB1359; 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DIR:OUT; SFP:1101; SCL:1; SRVR:MWHPR11MB1359; H:MWHPR11MB1360.namprd11.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; received-spf: None (protection.outlook.com: harmonicinc.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: harmonicinc.com X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Oct 2016 17:05:30.2253 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 19294cf8-3352-4dde-be9e-7f47b9b6b73d X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR11MB1359 Subject: Re: [dpdk-dev] [PATCH] net/i40e: add additional prefetch instructions for bulk rx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 Oct 2016 17:05:33 -0000 > -----Original Message----- > From: Wu, Jingjing [mailto:jingjing.wu@intel.com] > Sent: Monday, October 10, 2016 4:26 PM > To: Yigit, Ferruh; Vladyslav Buslov; Zhang, Helin > Cc: dev@dpdk.org > Subject: RE: [dpdk-dev] [PATCH] net/i40e: add additional prefetch > instructions for bulk rx >=20 >=20 >=20 > > -----Original Message----- > > From: Yigit, Ferruh > > Sent: Wednesday, September 14, 2016 9:25 PM > > To: Vladyslav Buslov ; Zhang, Helin > > ; Wu, Jingjing > > Cc: dev@dpdk.org > > Subject: Re: [dpdk-dev] [PATCH] net/i40e: add additional prefetch > > instructions for bulk rx > > > > On 7/14/2016 6:27 PM, Vladyslav Buslov wrote: > > > Added prefetch of first packet payload cacheline in > > > i40e_rx_scan_hw_ring Added prefetch of second mbuf cacheline in > > > i40e_rx_alloc_bufs > > > > > > Signed-off-by: Vladyslav Buslov > > > --- > > > drivers/net/i40e/i40e_rxtx.c | 7 +++++-- > > > 1 file changed, 5 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/net/i40e/i40e_rxtx.c > > > b/drivers/net/i40e/i40e_rxtx.c index d3cfb98..e493fb4 100644 > > > --- a/drivers/net/i40e/i40e_rxtx.c > > > +++ b/drivers/net/i40e/i40e_rxtx.c > > > @@ -1003,6 +1003,7 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue > *rxq) > > > /* Translate descriptor info to mbuf parameters */ > > > for (j =3D 0; j < nb_dd; j++) { > > > mb =3D rxep[j].mbuf; > > > + rte_prefetch0(RTE_PTR_ADD(mb->buf_addr, > > RTE_PKTMBUF_HEADROOM)); >=20 > Why did prefetch here? I think if application need to deal with packet, i= t is > more suitable to put it in application. >=20 > > > qword1 =3D rte_le_to_cpu_64(\ > > > rxdp[j].wb.qword1.status_error_len); > > > pkt_len =3D ((qword1 & > > I40E_RXD_QW1_LENGTH_PBUF_MASK) >> > > > @@ -1086,9 +1087,11 @@ i40e_rx_alloc_bufs(struct i40e_rx_queue > *rxq) > > > > > > rxdp =3D &rxq->rx_ring[alloc_idx]; > > > for (i =3D 0; i < rxq->rx_free_thresh; i++) { > > > - if (likely(i < (rxq->rx_free_thresh - 1))) > > > + if (likely(i < (rxq->rx_free_thresh - 1))) { > > > /* Prefetch next mbuf */ > > > - rte_prefetch0(rxep[i + 1].mbuf); > > > + rte_prefetch0(&rxep[i + 1].mbuf->cacheline0); > > > + rte_prefetch0(&rxep[i + 1].mbuf->cacheline1); > > > + } > Agree with this change. And when I test it by testpmd with iofwd, no > performance increase is observed but minor decrease. > Can you share will us when it will benefit the performance in your scenar= io ? >=20 >=20 > Thanks > Jingjing Hello Jingjing, Thanks for code review. My use case: We have simple distributor thread that receives packets from p= ort and distributes them among worker threads according to VLAN and MAC add= ress hash.=20 While working on performance optimization we determined that most of CPU us= age of this thread is in DPDK. As and optimization we decided to switch to rx burst alloc function, howeve= r that caused additional performance degradation compared to scatter rx mod= e. In profiler two major culprits were: 1. Access to packet data Eth header in application code. (cache miss) 2. Setting next packet descriptor field to NULL in DPDK i40e_rx_alloc_buf= s code. (this field is in second descriptor cache line that was not prefetc= hed) After applying my fixes performance improved compared to scatter rx mode. I assumed that prefetch of first cache line of packet data belongs to DPDK = because it is done in scatter rx mode. (in i40e_recv_scattered_pkts) It can be moved to application side but IMO it is better to be consistent a= cross all rx modes. Regards, Vladyslav