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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MWHPR11MB1886.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 106dc392-9ef5-4399-2a34-08da84d9c6ff X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Aug 2022 07:33:30.7571 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: gJUOmEKuAyQrVKGoy9VcK6CE2nSlc6ehJ6yOwkpJnuGSNqxA6zvFu11YbtdxmKrwLDSztH9IiW9QLnsE5va+Rg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR11MB3309 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Zeng, ZhichaoX > Sent: Wednesday, August 17, 2022 4:21 PM > To: dev@dpdk.org > Cc: Yang, Qiming ; Zeng, ZhichaoX > ; Zhang, Qi Z > Subject: [PATCH v2] net/ice: support disabling ACL engine in DCF via deva= rgs >=20 > From: Zhichao Zeng One line more >=20 > Support disabling DCF ACL engine via devarg "acl=3Doff" in cmdline, aimin= g to > shorten the DCF startup time. >=20 > Signed-off-by: Zhichao Zeng >=20 > --- > v2: add document for the new devarg > --- > doc/guides/nics/ice.rst | 11 ++++++ > drivers/net/ice/ice_dcf_ethdev.c | 58 +++++++++++++++++++++++------- > drivers/net/ice/ice_dcf_ethdev.h | 6 ++++ > drivers/net/ice/ice_dcf_parent.c | 3 ++ > drivers/net/ice/ice_ethdev.h | 2 ++ > drivers/net/ice/ice_generic_flow.c | 12 +++++++ > 6 files changed, 79 insertions(+), 13 deletions(-) >=20 > diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst index > 6b903b9bbc..3aa58d3f2c 100644 > --- a/doc/guides/nics/ice.rst > +++ b/doc/guides/nics/ice.rst > @@ -296,6 +296,17 @@ The DCF PMD needs to advertise and acquire DCF > capability which allows DCF to send AdminQ commands that it would like t= o > execute over to the PF and receive responses for the same from PF. >=20 > +Additional Options > +++++++++++++++++++ > + > +- ``Disable ACL Engine`` (default ``enabled``) > + > + By default, all flow engines are enabled. But if user does not need > + the ACL engine related functions, user can set ``devargs`` parameter > + ``acl=3Doff`` to disable the ACL engine and shorten the startup time. > + > + -a 18:01.0,cap=3Ddcf,acl=3Doff > + > .. _figure_ice_dcf: >=20 > .. figure:: img/ice_dcf.* > diff --git a/drivers/net/ice/ice_dcf_ethdev.c > b/drivers/net/ice/ice_dcf_ethdev.c > index 0da267db1f..a51e404e64 100644 > --- a/drivers/net/ice/ice_dcf_ethdev.c > +++ b/drivers/net/ice/ice_dcf_ethdev.c > @@ -45,6 +45,26 @@ ice_dcf_dev_init(struct rte_eth_dev *eth_dev); static > int ice_dcf_dev_uninit(struct rte_eth_dev *eth_dev); >=20 > +static int > +ice_dcf_cap_check_handler(__rte_unused const char *key, > + const char *value, __rte_unused void *opaque); > + > +static int > +ice_dcf_engine_disabled_handler(__rte_unused const char *key, > + const char *value, __rte_unused void *opaque); > + > +struct ice_devarg { > + enum ice_dcf_devrarg type; > + const char *key; > + int (*handler)(__rte_unused const char *key, > + const char *value, __rte_unused void *opaque); }; > + > +static const struct ice_devarg ice_devargs_table[] =3D { > + {ICE_DCF_DEVARG_CAP, "cap", ice_dcf_cap_check_handler}, > + {ICE_DCF_DEVARG_ACL, "acl", ice_dcf_engine_disabled_handler}, }; > + > struct rte_ice_dcf_xstats_name_off { > char name[RTE_ETH_XSTATS_NAME_SIZE]; > unsigned int offset; > @@ -1909,6 +1929,16 @@ ice_dcf_dev_uninit(struct rte_eth_dev *eth_dev) > return 0; > } >=20 > +static int > +ice_dcf_engine_disabled_handler(__rte_unused const char *key, > + const char *value, __rte_unused void *opaque) { > + if (strcmp(value, "off")) > + return -1; > + > + return 0; > +} > + > static int > ice_dcf_cap_check_handler(__rte_unused const char *key, > const char *value, __rte_unused void *opaque) @@ > -1919,11 +1949,11 @@ ice_dcf_cap_check_handler(__rte_unused const char > *key, > return 0; > } >=20 > -static int > -ice_dcf_cap_selected(struct rte_devargs *devargs) > +int > +ice_devargs_check(struct rte_devargs *devargs, enum ice_dcf_devrarg > +devarg_type) > { > struct rte_kvargs *kvlist; > - const char *key =3D "cap"; > + unsigned int i =3D 0; > int ret =3D 0; >=20 > if (devargs =3D=3D NULL) > @@ -1933,16 +1963,18 @@ ice_dcf_cap_selected(struct rte_devargs > *devargs) > if (kvlist =3D=3D NULL) > return 0; >=20 > - if (!rte_kvargs_count(kvlist, key)) > - goto exit; > - > - /* dcf capability selected when there's a key-value pair: cap=3Ddcf */ > - if (rte_kvargs_process(kvlist, key, > - ice_dcf_cap_check_handler, NULL) < 0) > - goto exit; > - > - ret =3D 1; > + for (i =3D 0; i < ARRAY_SIZE(ice_devargs_table); i++) { > + if (devarg_type =3D=3D ice_devargs_table[i].type) { > + if (!rte_kvargs_count(kvlist, ice_devargs_table[i].key)) > + goto exit; >=20 > + if (rte_kvargs_process(kvlist, ice_devargs_table[i].key, > + ice_devargs_table[i].handler, NULL) < > 0) > + goto exit; > + ret =3D 1; > + break; > + } > + } > exit: > rte_kvargs_free(kvlist); > return ret; > @@ -1960,7 +1992,7 @@ eth_ice_dcf_pci_probe(__rte_unused struct > rte_pci_driver *pci_drv, > uint16_t dcf_vsi_id; > int i, ret; >=20 > - if (!ice_dcf_cap_selected(pci_dev->device.devargs)) > + if (!ice_devargs_check(pci_dev->device.devargs, > ICE_DCF_DEVARG_CAP)) > return 1; >=20 > ret =3D rte_eth_devargs_parse(pci_dev->device.devargs->args, > ð_da); diff --git a/drivers/net/ice/ice_dcf_ethdev.h > b/drivers/net/ice/ice_dcf_ethdev.h > index 27f6402786..4baaec4b8b 100644 > --- a/drivers/net/ice/ice_dcf_ethdev.h > +++ b/drivers/net/ice/ice_dcf_ethdev.h > @@ -64,12 +64,18 @@ struct ice_dcf_vf_repr { > struct ice_dcf_vlan outer_vlan_info; /* DCF always handle outer > VLAN */ }; >=20 > +enum ice_dcf_devrarg { > + ICE_DCF_DEVARG_CAP, Does ICE_DCF_DEVARG_CAP means no ACL? > + ICE_DCF_DEVARG_ACL, > +}; > + > extern const struct rte_tm_ops ice_dcf_tm_ops; void > ice_dcf_handle_pf_event_msg(struct ice_dcf_hw *dcf_hw, > uint8_t *msg, uint16_t msglen); > int ice_dcf_init_parent_adapter(struct rte_eth_dev *eth_dev); void > ice_dcf_uninit_parent_adapter(struct rte_eth_dev *eth_dev); >=20 > +int ice_devargs_check(struct rte_devargs *devargs, enum ice_dcf_devrarg > +devarg_type); > int ice_dcf_vf_repr_init(struct rte_eth_dev *vf_rep_eth_dev, void > *init_param); int ice_dcf_vf_repr_uninit(struct rte_eth_dev > *vf_rep_eth_dev); int ice_dcf_vf_repr_init_vlan(struct rte_eth_dev > *vf_rep_eth_dev); diff --git a/drivers/net/ice/ice_dcf_parent.c > b/drivers/net/ice/ice_dcf_parent.c > index 2f96dedcce..c67c865d8e 100644 > --- a/drivers/net/ice/ice_dcf_parent.c > +++ b/drivers/net/ice/ice_dcf_parent.c > @@ -466,6 +466,9 @@ ice_dcf_init_parent_adapter(struct rte_eth_dev > *eth_dev) >=20 > ice_dcf_update_vf_vsi_map(parent_hw, hw->num_vfs, hw- > >vf_vsi_map); >=20 > + if (ice_devargs_check(eth_dev->device->devargs, > ICE_DCF_DEVARG_ACL)) > + parent_adapter->disabled_engine_mask |=3D > BIT(ICE_FLOW_ENGINE_ACL); > + > err =3D ice_flow_init(parent_adapter); > if (err) { > PMD_INIT_LOG(ERR, "Failed to initialize flow"); diff --git > a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h index > ec23dae665..5bd5ead0e6 100644 > --- a/drivers/net/ice/ice_ethdev.h > +++ b/drivers/net/ice/ice_ethdev.h > @@ -610,6 +610,8 @@ struct ice_adapter { > struct ice_rss_prof_info rss_prof_info[ICE_MAX_PTGS]; > /* True if DCF state of the associated PF is on */ > bool dcf_state_on; > + /* Set bit if the engine is disabled */ > + unsigned long disabled_engine_mask; > struct ice_parser *psr; > #ifdef RTE_ARCH_X86 > bool rx_use_avx2; > diff --git a/drivers/net/ice/ice_generic_flow.c > b/drivers/net/ice/ice_generic_flow.c > index 57eb002bde..d496c28dec 100644 > --- a/drivers/net/ice/ice_generic_flow.c > +++ b/drivers/net/ice/ice_generic_flow.c > @@ -28,6 +28,8 @@ > /*Pipeline mode, fdir used at distributor stage*/ #define > ICE_FLOW_CLASSIFY_STAGE_DISTRIBUTOR 2 >=20 > +#define ICE_FLOW_ENGINE_DISABLED(mask, type) ((mask) & BIT(type)) > + > static struct ice_engine_list engine_list =3D > TAILQ_HEAD_INITIALIZER(engine_list); >=20 > @@ -1841,6 +1843,11 @@ ice_flow_init(struct ice_adapter *ad) > return -ENOTSUP; > } >=20 > + if (ICE_FLOW_ENGINE_DISABLED(ad->disabled_engine_mask, > engine->type)) { > + PMD_INIT_LOG(INFO, "Engine %d disabled", engine- > >type); > + continue; > + } > + > ret =3D engine->init(ad); > if (ret) { > PMD_INIT_LOG(ERR, "Failed to initialize engine %d", > @@ -1861,6 +1868,11 @@ ice_flow_uninit(struct ice_adapter *ad) > void *temp; >=20 > RTE_TAILQ_FOREACH_SAFE(engine, &engine_list, node, temp) { > + if (ICE_FLOW_ENGINE_DISABLED(ad->disabled_engine_mask, > engine->type)) { > + PMD_DRV_LOG(DEBUG, "Engine %d disabled skip it", > engine->type); > + continue; > + } > + > if (engine->uninit) > engine->uninit(ad); > } > -- > 2.25.1