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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR11MB5207.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: cc98cf58-fab1-4e0f-d0d7-08daf9415f36 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Jan 2023 10:47:19.1496 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pjcuOOOO3v7btT2JwQuNbpo8lGZVAi8XNP6s0GucZQoVLFX6MHB1be8sYaruuhAH4z4rI2y/u2fvusuZz/lwpQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR11MB5889 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > As part of the process of restarting a dma instance, the IOAT driver > will reset the HW addresses and state values. The read and write > indexes for SW use need to be similarly reset to keep HW and SW in > sync. >=20 > Fixes: 583f046dd404 ("dma/ioat: add start and stop") > Cc: conor.walsh@intel.com > Cc: stable@dpdk.org >=20 > Signed-off-by: Bruce Richardson Reviewed-by: Conor Walsh