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Tue, 11 May 2021 08:44:44 +0000 From: Pavan Nikhilesh Bhagavatula To: "Wang, Haiyue" , "david.marchand@redhat.com" , Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko , Jiawen Wu , Jian Wang , "Chautru, Nicolas" , Thomas Monjalon , "Yigit, Ferruh" , Andrew Rybchenko CC: "dev@dpdk.org" , "stable@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v3 2/2] eal: fix side effects in ptr align macros Thread-Index: AQHXRdRSdTWbEKThtkqLC3weO16aoqrdimqAgABrygA= Date: Tue, 11 May 2021 08:44:44 +0000 Message-ID: References: <20210510140214.2627-1-pbhagavatula@marvell.com> <20210510194008.403-1-pbhagavatula@marvell.com> <20210510194008.403-2-pbhagavatula@marvell.com> In-Reply-To: Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=marvell.com; x-originating-ip: [2405:201:d009:304d:3168:d7df:fe47:75c6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: a589bf9d-6b13-43cd-5846-08d9145906c3 x-ms-traffictypediagnostic: PH0PR18MB3799: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:9508; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR18MB4086.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a589bf9d-6b13-43cd-5846-08d9145906c3 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 May 2021 08:44:44.6591 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: FNcV0XMzDMoWipvXg2AB/gOsX7xD74yE0V6EQ5PWsQBqMy7zFxOlNJEgbvJQxTcPU0n6FRdGjS7ak1NrJTchz5nddaMB/3Y87UInjZQDglQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR18MB3799 X-Proofpoint-GUID: wQERLo-cZk17U3WuoUUpxzVy5G0F8v8n X-Proofpoint-ORIG-GUID: wQERLo-cZk17U3WuoUUpxzVy5G0F8v8n X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-11_02:2021-05-10, 2021-05-11 signatures=0 Subject: Re: [dpdk-dev] [PATCH v3 2/2] eal: fix side effects in ptr align macros X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >> -----Original Message----- >> From: pbhagavatula@marvell.com >> Sent: Tuesday, May 11, 2021 03:40 >> To: david.marchand@redhat.com; Wang, Haiyue >; Matan Azrad ; >> Shahaf Shuler ; Viacheslav Ovsiienko >; Jiawen Wu >> ; Jian Wang ; >Chautru, Nicolas >> ; Thomas Monjalon >; Yigit, Ferruh >> ; Andrew Rybchenko > >> Cc: dev@dpdk.org; Pavan Nikhilesh ; >stable@dpdk.org >> Subject: [dpdk-dev] [PATCH v3 2/2] eal: fix side effects in ptr align >macros >> >> From: Pavan Nikhilesh >> >> Avoid expanding parameters inside RTE_*_ALIGN macros. >> Update common_autotest to detect macro side effects. >> Workaround static arrays relying on RTE_ALIGN macros. >> >> Fixes: af75078fece3 ("first public release") >> Cc: stable@dpdk.org >> >> Signed-off-by: Pavan Nikhilesh >> Signed-off-by: David Marchand >> --- >> app/test/test_common.c | 6 ++++++ >> drivers/net/e1000/e1000_ethdev.h | 7 ++++--- >> drivers/net/ixgbe/ixgbe_ethdev.h | 6 ++++-- >> drivers/net/mlx5/mlx5_rxtx_vec.h | 7 ++++--- >> drivers/net/txgbe/txgbe_ethdev.h | 6 ++++-- >> examples/bbdev_app/main.c | 2 +- >> lib/eal/include/rte_common.h | 17 +++++++++++++---- >> lib/ethdev/rte_eth_ctrl.h | 5 +++-- >> 8 files changed, 39 insertions(+), 17 deletions(-) >> >> diff --git a/app/test/test_common.c b/app/test/test_common.c >> index 0dbb87e741..9efe3b10f9 100644 >> --- a/app/test/test_common.c >> +++ b/app/test/test_common.c >> @@ -69,6 +69,12 @@ test_macros(int __rte_unused unused_parm) >> TEST_SIDE_EFFECT_2(RTE_PTR_ADD, void *, size_t); >> TEST_SIDE_EFFECT_2(RTE_PTR_DIFF, void *, void *); >> TEST_SIDE_EFFECT_2(RTE_PTR_SUB, void *, size_t); >> + TEST_SIDE_EFFECT_2(RTE_PTR_ALIGN, void *, size_t); >> + TEST_SIDE_EFFECT_2(RTE_PTR_ALIGN_CEIL, void *, size_t); >> + TEST_SIDE_EFFECT_2(RTE_PTR_ALIGN_FLOOR, void *, size_t); >> + TEST_SIDE_EFFECT_2(RTE_ALIGN, unsigned int, unsigned int); >> + TEST_SIDE_EFFECT_2(RTE_ALIGN_CEIL, unsigned int, unsigned >int); >> + TEST_SIDE_EFFECT_2(RTE_ALIGN_FLOOR, unsigned int, >unsigned int); >> TEST_SIDE_EFFECT_2(RTE_ALIGN_MUL_CEIL, unsigned int, >unsigned int); >> TEST_SIDE_EFFECT_2(RTE_ALIGN_MUL_FLOOR, unsigned int, >unsigned int); >> TEST_SIDE_EFFECT_2(RTE_ALIGN_MUL_NEAR, unsigned int, >unsigned int); >> diff --git a/drivers/net/e1000/e1000_ethdev.h >b/drivers/net/e1000/e1000_ethdev.h >> index 3b4d9c3ee6..155d825d89 100644 >> --- a/drivers/net/e1000/e1000_ethdev.h >> +++ b/drivers/net/e1000/e1000_ethdev.h >> @@ -332,9 +332,10 @@ struct igb_eth_syn_filter_ele { >> }; >> >> #define IGB_FLEX_FILTER_MAXLEN 128 /**< bytes to use in flex >filter. */ >> -#define IGB_FLEX_FILTER_MASK_SIZE \ >> - (RTE_ALIGN(IGB_FLEX_FILTER_MAXLEN, CHAR_BIT) / >CHAR_BIT) >> - /**< mask bytes in flex filter. */ >> +#define IGB_FLEX_FILTER_MASK_SIZE = \ >> + (RTE_ALIGN_FLOOR(IGB_FLEX_FILTER_MAXLEN + (CHAR_BIT - >1), CHAR_BIT) / \ >> + CHAR_BIT) >> +/**< mask bytes in flex filter. */ >> > >Since: >RTE_ALIGN --> RTE_ALIGN_CEIL(val, align) --> RTE_ALIGN_FLOOR(...) > >Why only change 'RTE_ALIGN_CEIL', but then call 'RTE_ALIGN_FLOOR' >directly ? >Sorry, can't get the point. : - ( > RTE_ALIGN_CEIL is prone to macro side effects since it uses align twice in = the macro. To fix it RTE_ALIGN_CEIL first expands the val and align values to temporar= y values=20 and then calls ALIGN_FLOOR. Due to this we can no longer use ALIGN/ALIGN_CEIL in static array declarati= ons Example: In file included from ../lib/eal/x86/include/rte_atomic.h:13, from ../examples/bbdev_app/main.c:21: ../lib/eal/include/rte_common.h:312:15: error: braced-group within expressi= on allowed only inside a function __extension__({ \ ^ ../examples/bbdev_app/main.c:48:18: note: in expansion of macro 'RTE_ALIGN_= CEIL' #define NCB (3 * RTE_ALIGN_CEIL(K + 4, 32)) ^~~~~~~~~~~~~~ ../examples/bbdev_app/main.c:145:23: note: in expansion of macro 'NCB' uint8_t llr_temp_buf[NCB]; To workaround this I had to call RTE_ALIGN_FLOOR for known constants direct= ly. >Why not change 'RTE_ALIGN' if it has issue ? > >> >> diff --git a/lib/eal/include/rte_common.h >b/lib/eal/include/rte_common.h >> index a142596587..6acd067b5c 100644 >> --- a/lib/eal/include/rte_common.h >> +++ b/lib/eal/include/rte_common.h >> @@ -294,8 +294,13 @@ static void >__attribute__((destructor(RTE_PRIO(prio)), used)) func(void) >> * point to an address no lower than the first parameter. Second >parameter >> * must be a power-of-two value. >> */ >> -#define RTE_PTR_ALIGN_CEIL(ptr, align) \ >> - RTE_PTR_ALIGN_FLOOR((typeof(ptr))RTE_PTR_ADD(ptr, (align) >- 1), align) >> +#define RTE_PTR_ALIGN_CEIL(ptr, align) = \ >> + __extension__({ = \ >> + typeof(ptr) _pc =3D (ptr); \ >> + typeof(align) _ac =3D (align); \ >> + > RTE_PTR_ALIGN_FLOOR((typeof(ptr))RTE_PTR_ADD(_pc, _ac - >1), \ >> + _ac); \ >> + }) >> >> /** >> * Macro to align a value to a given power-of-two. The resultant value >> @@ -303,8 +308,12 @@ static void >__attribute__((destructor(RTE_PRIO(prio)), used)) func(void) >> * than the first parameter. Second parameter must be a power-of- >two >> * value. >> */ >> -#define RTE_ALIGN_CEIL(val, align) \ >> - RTE_ALIGN_FLOOR(((val) + ((typeof(val)) (align) - 1)), align) >> +#define RTE_ALIGN_CEIL(val, align) = \ >> + __extension__({ = \ >> + typeof(val) _vc =3D (val); \ >> + typeof(val) _ac =3D (typeof(val))(align); \ >> + RTE_ALIGN_FLOOR((_vc + _ac - 1), _ac); \ >> + }) >> >> /** >> * Macro to align a pointer to a given power-of-two. The resultant >> diff --git a/lib/ethdev/rte_eth_ctrl.h b/lib/ethdev/rte_eth_ctrl.h >> index 42652f9cce..863e56170b 100644 >> --- a/lib/ethdev/rte_eth_ctrl.h >> +++ b/lib/ethdev/rte_eth_ctrl.h >> @@ -431,8 +431,9 @@ enum rte_fdir_mode { >> }; >> >> #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t)) >> -#define RTE_FLOW_MASK_ARRAY_SIZE \ >> - (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT) >> +#define RTE_FLOW_MASK_ARRAY_SIZE = \ >> + (RTE_ALIGN_FLOOR(RTE_ETH_FLOW_MAX + (UINT64_BIT - 1), >UINT64_BIT) / \ >> + UINT64_BIT) >> >> /** >> * A structure used to get the information of flow director filter. >> -- >> 2.17.1