RE: [EXTERNAL] [PATCH] config/arm: fix meson for native instruction set Arm CPUs

[Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>]

Hi Gregory, 

> Arm meson.build unconditionally relays on the `extra_features`
> member of SoC configuration.
> 
> SoC dictionary is populated for Arm CPUs with generic instruction set
> only.
> For Arm CPUs with native CPU instruction set the SoC dictionary is
> empty.
> 
> meson setup failed for the BlueField-3 because it belongs to
> the native Arm CPU instruction set.
> 
> The patch adds global definition for extra_features.
> 
> Fixes: 7829776d0abf ("config/arm: add extra -march features")
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> ---
>  config/arm/meson.build | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index a97a28ebb7..f971ed3c1b 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -767,6 +767,7 @@ dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
> 
>  update_flags = false
>  soc_flags = []
> +extra_features = []

We do set the default to be [] when extra_march_features is not found
In soc_config.

extra_features = soc_config.get('extra_march_features', [])

I have tested cross build[1] of bluefield3 with  both meson 1.7.0 and 0.61.2
and didn’t see any failure which version of meson are you using?

[1]meson build --cross-file config/arm/arm64_bluefield3_linux_gcc

Thanks,
Pavan.


>  if dpdk_conf.get('RTE_ARCH_32')
>      # 32-bit build
>      dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> --
> 2.45.2