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PH0PR18MB4086.namprd18.prod.outlook.com (2603:10b6:510:3::9) by SJ0PR18MB4060.namprd18.prod.outlook.com (2603:10b6:a03:2e4::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6433.15; Mon, 29 May 2023 13:17:09 +0000 Received: from PH0PR18MB4086.namprd18.prod.outlook.com ([fe80::398e:edab:a413:7ef9]) by PH0PR18MB4086.namprd18.prod.outlook.com ([fe80::398e:edab:a413:7ef9%3]) with mapi id 15.20.6433.022; Mon, 29 May 2023 13:17:09 +0000 From: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com> To: Stephen Hemminger <stephen@networkplumber.org> CC: Jerin Jacob Kollanukkaran <jerinj@marvell.com>, "Honnappa.Nagarahalli@arm.com" <Honnappa.Nagarahalli@arm.com>, "nd@arm.com" <nd@arm.com>, Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>, "dev@dpdk.org" <dev@dpdk.org> Subject: RE: [EXT] Re: [PATCH v2 2/3] ip_frag: improve reassembly lookup performance Thread-Topic: [EXT] Re: [PATCH v2 2/3] ip_frag: improve reassembly lookup performance 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13ebdcef-1154-42fe-5b5d-08db604701e3 X-MS-Exchange-CrossTenant-originalarrivaltime: 29 May 2023 13:17:09.3675 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: JWK59cIYKm4oxNMLOvAhIRwRV62AhxN+dNNSHALcb7As/o/2zjhCUH1H6XkaG+izpH3gKaqvKb49qI4m4fkypo+lOMteLMt2yiG6J/L8SAw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR18MB4060 X-Proofpoint-GUID: iWwAgvwJrM5i_wSn-pg-GL8wNrzMRlG2 X-Proofpoint-ORIG-GUID: iWwAgvwJrM5i_wSn-pg-GL8wNrzMRlG2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-29_10,2023-05-25_03,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org > On Tue, 23 May 2023 20:09:20 +0530 > <pbhagavatula@marvell.com> wrote: >=20 > > From: Pavan Nikhilesh <pbhagavatula@marvell.com> > > > > Improve reassembly lookup performance by using NEON intrinsics for > > key validation. > > > > Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> > > --- > > lib/ip_frag/ip_frag_internal.c | 224 +++++++++++++++++++++++++------ > > lib/ip_frag/ip_reassembly.h | 6 + > > lib/ip_frag/rte_ip_frag_common.c | 10 ++ > > 3 files changed, 196 insertions(+), 44 deletions(-) >=20 >=20 > Using a function pointer for the lookup has some downsides. > On Intel an indirect call is slower especially with SPECTRE mitigations. >=20 The patch doesn't use direct function pointers, it stores the function id a= nd switches between them. Function ID scheme doesn't break primary/secondary process scheme even with= ASLR scheme. > The bigger issue is that indirect call will break usage from primary/seco= ndary > process with ASLR. If primary sets up table and secondary uses it the fun= ction > will be in different places. I will be dropping this patch since the performance improvement with NEON i= s negligible, there is lot of bucket=20 state that we unfortunately don't cache with the current implementation.