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Fri, 1 Mar 2024 14:42:03 +0000 From: Amit Prakash Shukla To: Pavan Nikhilesh Bhagavatula , Jerin Jacob CC: "dev@dpdk.org" , Vamsi Krishna Attunuru , Nithin Kumar Dabilpuram , Anoob Joseph , Aakash Sasidharan Subject: RE: [PATCH v2] app/eventdev: support DMA adapter test Thread-Topic: [PATCH v2] app/eventdev: support DMA adapter test Thread-Index: AQHaaguMOQxKHaLjZ0+yBFCdRcKuirEi2/UAgAAaJkA= Date: Fri, 1 Mar 2024 14:42:03 +0000 Message-ID: References: <20240226132608.3732591-1-amitprakashs@marvell.com> <20240228060102.4137229-1-amitprakashs@marvell.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: PH0PR18MB5167:EE_|SJ0PR18MB4463:EE_ x-ms-office365-filtering-correlation-id: f7fdcdec-15a5-410b-c809-08dc39fdc293 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: xzsJu5LNNNeHf8RCur1BUNQx2puJTPH7w9HJNnMZi7psfSPWclrWA0nchB2YCuA2ydiy4m+yaA0U03Qs+/pjTogqF8LntY+TEqmYIAMSszHR5jt0Usq5N6pLvXk+jEIm7iXRdNyKnkDD25gcDsHeKdWCAWySlfqwqcFFRfYiGkHoaSbouVZfceb4yOchmn50NJLnKfIXy0hlo2lr+r6I2fHHEZ7IvzWfDTMeqHRcrF8dk5h9IVuFuk1JOr7kTbH4XkM+DLJEeiRcQKQ3ZnpyepehF61IeGv6RKY1i7QtOON91jNsD6iO2n2XSkxLeklqIDLRz8+g2l5r9E6wN/CPKgE4l15toapp5IR978OCrbWXs80aaV2riTSTEankawQMcg4cWjGpNy3pebgI2+EisJZiER8inyga282vP56QXK7e8qAIGIvl5uEPG6FMvpBVMd7Nnh8uh3jmNAVceAYL2+PtzaOqVQuzshBQXPvgUgXX+Q8ZDodD/vqjJ1rEXXlx2W1hSl3aMTpAe+k0ZOKmIqJ12wI6SFLOxc0g3vJUzMFAhvY/Y4H1uDBbh/iE6pZi8/HRiEL16My+mvFwpLBDlB0qi0rt2RrWhDatHQ5UrHLXMTG17hVcCHkzqhSJx10c529F1N7lA3Z8IKhQ6m9T5qjhq6V0xtJi7lRyi0CCuY2u0D7aV7aqOjlfeo6YgiTE8u/SB55zqjExCBkQ3GCxZA== x-forefront-antispam-report: CIP:255.255.255.255; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR18MB5167.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f7fdcdec-15a5-410b-c809-08dc39fdc293 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Mar 2024 14:42:03.3437 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: SGGRhit8EpINeKzpm/k3fSmI5JpUiSXpg6LKWpSA/oAkDzgQg1tXxJNcaCMwo31pFSiz0YMPQuh8n8QKMhBsxKo6P1jYsfRBkEs81mwiNRQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR18MB4463 X-Proofpoint-ORIG-GUID: rvWHhfJXECTKtXOiiApLdRaLy-mGFDVZ X-Proofpoint-GUID: rvWHhfJXECTKtXOiiApLdRaLy-mGFDVZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-01_14,2024-03-01_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Pavan, Thanks for the review and feedback. I will send next version with suggested= changes. Thanks, Amit Shukla > > diff --git a/app/test-eventdev/test_perf_common.c b/app/test- > > eventdev/test_perf_common.c index 5e0255cfeb..509d3f9232 100644 > > --- a/app/test-eventdev/test_perf_common.c > > +++ b/app/test-eventdev/test_perf_common.c > > @@ -559,6 +559,84 @@ crypto_adapter_enq_op_fwd(struct prod_data > *p) > > __func__, rte_lcore_id(), alloc_failures); } > > > > +static inline void > > +dma_adapter_enq_op_new(struct prod_data *p) { > > + struct test_perf *t =3D p->t; > > + const uint32_t nb_flows =3D t->nb_flows; > > + const uint64_t nb_pkts =3D t->nb_pkts; > > + struct rte_event_dma_adapter_op *op; > > + struct evt_options *opt =3D t->opt; > > + uint32_t flow_counter =3D 0; > > + uint64_t count =3D 0; > > + > > + if (opt->verbose_level > 1) > > + printf("%s(): lcore %d queue %d dma_dev_id %u > > dma_dev_vhcan_id %u\n", > > + __func__, rte_lcore_id(), p->queue_id, p->da.dma_dev_id, > > + p->da.vchan_id); > > + > > + while (count < nb_pkts && t->done =3D=3D false) { > > + op =3D p->da.dma_op[flow_counter++ % nb_flows]; > > + while (rte_dma_copy_sg(op->dma_dev_id, op->vchan, op- > > >src_seg, > > + op->dst_seg, op->nb_src, op->nb_dst, > > + op->flags) < 0 && t->done =3D=3D false) >=20 > Is op type new really sending events to eventdev? If not, you can remove = this > test from the app for now and add it when dmadev supports enqueueing ops > similar to cryptodev. >=20 > You can set --dma_adptr_mode default to FORWARD and say NEW is not > supported. >=20 > > + rte_pause(); > > + > > + count++; > > + } > > +} > > + > > +static inline void > > +dma_adapter_enq_op_fwd(struct prod_data *p) { > > + struct test_perf *t =3D p->t; > > + const uint32_t nb_flows =3D t->nb_flows; > > + const uint64_t nb_pkts =3D t->nb_pkts; > > + struct rte_event_dma_adapter_op *op; > > + const uint8_t dev_id =3D p->dev_id; > > + struct evt_options *opt =3D t->opt; > > + const uint8_t port =3D p->port_id; > > + uint32_t flow_counter =3D 0; > > + struct rte_event ev; > > + uint64_t count =3D 0; > > + > > + if (opt->verbose_level > 1) > > + printf("%s(): lcore %d port %d queue %d dma_dev_id %u > > dma_dev_vchan_id %u\n", > > + __func__, rte_lcore_id(), port, p->queue_id, > > + p->da.dma_dev_id, p->da.vchan_id); > > + > > + ev.event =3D 0; > > + ev.op =3D RTE_EVENT_OP_NEW; > > + ev.queue_id =3D p->queue_id; > > + ev.sched_type =3D RTE_SCHED_TYPE_ATOMIC; > > + ev.event_type =3D RTE_EVENT_TYPE_CPU; > > + > > + while (count < nb_pkts && t->done =3D=3D false) { > > + op =3D p->da.dma_op[flow_counter++ % nb_flows]; > > + ev.event_ptr =3D op; > > + > > + while (rte_event_dma_adapter_enqueue(dev_id, port, &ev, 1) > > !=3D 1 && > > + t->done =3D=3D false) > > + rte_pause(); > > + > > + count++; > > + } > > +} > > + > > +static inline int > > +perf_event_dma_producer(void *arg) > > +{ > > + struct prod_data *p =3D arg; > > + struct evt_options *opt =3D p->t->opt; > > + > > + if (opt->dma_adptr_mode =3D=3D RTE_EVENT_DMA_ADAPTER_OP_NEW) > > + dma_adapter_enq_op_new(p); > > + else > > + dma_adapter_enq_op_fwd(p); > > + > > + return 0; > > +} > > + > > static inline int > > perf_event_crypto_producer(void *arg) { @@ -841,7 +919,9 @@ > > perf_producer_wrapper(void *arg) > > return perf_event_crypto_producer_burst(arg); > > else > > return perf_event_crypto_producer(arg); > > - } > > + } else if (t->opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_DMA_ADPTR) > > + return perf_event_dma_producer(arg); > > + > > return 0; > > } > > > > @@ -952,7 +1032,9 @@ perf_launch_lcores(struct evt_test *test, struct > > evt_options *opt, > > opt->prod_type =3D=3D > > > > EVT_PROD_TYPE_EVENT_TIMER_ADPTR || > > opt->prod_type =3D=3D > > - > > EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR) { > > + > > EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR || > > + opt->prod_type =3D=3D > > + > > EVT_PROD_TYPE_EVENT_DMA_ADPTR) { > > t->done =3D true; > > break; > > } > > @@ -962,7 +1044,8 @@ perf_launch_lcores(struct evt_test *test, struct > > evt_options *opt, > > if (new_cycles - dead_lock_cycles > dead_lock_sample && > > (opt->prod_type =3D=3D EVT_PROD_TYPE_SYNT || > > opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_TIMER_ADPTR > > || > > - opt->prod_type =3D=3D > > EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR)) { > > + opt->prod_type =3D=3D > > EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR || > > + opt->prod_type =3D=3D > > EVT_PROD_TYPE_EVENT_DMA_ADPTR)) { > > remaining =3D t->outstand_pkts - processed_pkts(t); > > if (dead_lock_remaining =3D=3D remaining) { > > rte_event_dev_dump(opt->dev_id, stdout); > @@ -1162,6 +1245,39 @@ > > perf_event_crypto_adapter_setup(struct > > test_perf *t, struct prod_data *p) > > return ret; > > } > > > > +static int > > +perf_event_dma_adapter_setup(struct test_perf *t, struct prod_data > > +*p) { > > + struct evt_options *opt =3D t->opt; > > + struct rte_event event; > > + uint32_t cap; > > + int ret; > > + > > + ret =3D rte_event_dma_adapter_caps_get(p->dev_id, p- > > >da.dma_dev_id, &cap); > > + if (ret) { > > + evt_err("Failed to get dma adapter capabilities"); > > + return ret; > > + } > > + > > + if (((opt->dma_adptr_mode =3D=3D > > RTE_EVENT_DMA_ADAPTER_OP_NEW) && > > + !(cap & > > RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_NEW)) || > > + ((opt->dma_adptr_mode =3D=3D > > RTE_EVENT_DMA_ADAPTER_OP_FORWARD) && > > + !(cap & > > RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD))) { > > + evt_err("dma adapter %s mode unsupported\n", > > + opt->dma_adptr_mode ? "OP_FORWARD" : > > "OP_NEW"); > > + return -ENOTSUP; > > + } > > + > > + if (cap & > > RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_VCHAN_EV_BIND) > > + ret =3D rte_event_dma_adapter_vchan_add(TEST_PERF_DA_ID, > > p->da.dma_dev_id, > > + p->da.vchan_id, &event); > > + else > > + ret =3D rte_event_dma_adapter_vchan_add(TEST_PERF_DA_ID, > > p->da.dma_dev_id, > > + p->da.vchan_id, NULL); > > + > > + return ret; > > +} > > + > > static void * > > cryptodev_sym_sess_create(struct prod_data *p, struct test_perf *t) > > { @@ -1399,6 +1515,77 @@ perf_event_dev_port_setup(struct evt_test > > *test, struct evt_options *opt, > > } > > > > qp_id++; > > + prod++; > > + } > > + } else if (opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_DMA_ADPTR) { > > + struct rte_event_port_conf conf =3D *port_conf; > > + struct rte_event_dma_adapter_op *op; > > + struct rte_mempool *pool =3D t->pool; > > + uint8_t dma_dev_id =3D 0; > > + uint16_t vchan_id =3D 0; > > + > > + ret =3D rte_event_dma_adapter_create(TEST_PERF_DA_ID, opt- > > >dev_id, &conf, 0); > > + if (ret) { > > + evt_err("Failed to create dma adapter"); > > + return ret; > > + } > > + > > + prod =3D 0; > > + for (; port < perf_nb_event_ports(opt); port++) { > > + struct prod_data *p =3D &t->prod[port]; > > + struct rte_event *response_info; > > + uint32_t flow_id; > > + > > + p->dev_id =3D opt->dev_id; > > + p->port_id =3D port; > > + p->queue_id =3D prod * stride; > > + p->da.dma_dev_id =3D dma_dev_id; > > + p->da.vchan_id =3D vchan_id; > > + p->da.dma_op =3D rte_zmalloc_socket(NULL, sizeof(void > > *) * t->nb_flows, > > + RTE_CACHE_LINE_SIZE, opt- > > >socket_id); > > + > > + p->t =3D t; > > + > > + ret =3D perf_event_dma_adapter_setup(t, p); > > + if (ret) > > + return ret; > > + > > + for (flow_id =3D 0; flow_id < t->nb_flows; flow_id++) { > > + rte_mempool_get(t->da_op_pool, (void > > **)&op); > > + > > + op->src_seg =3D rte_malloc(NULL, sizeof(struct > > rte_dma_sge), 0); > > + op->dst_seg =3D rte_malloc(NULL, sizeof(struct > > rte_dma_sge), 0); > > + > > + op->src_seg->addr =3D > > rte_pktmbuf_iova(rte_pktmbuf_alloc(pool)); > > + op->dst_seg->addr =3D > > rte_pktmbuf_iova(rte_pktmbuf_alloc(pool)); > > + op->src_seg->length =3D 1024; > > + op->dst_seg->length =3D 1024; > > + op->nb_src =3D 1; > > + op->nb_dst =3D 1; > > + op->flags =3D RTE_DMA_OP_FLAG_SUBMIT; > > + op->op_mp =3D t->da_op_pool; > > + op->dma_dev_id =3D dma_dev_id; > > + op->vchan =3D vchan_id; > > + > > + response_info =3D (struct rte_event *)((uint8_t > > *)op + > > + sizeof(struct > > rte_event_dma_adapter_op)); > > + response_info->queue_id =3D p->queue_id; > > + response_info->sched_type =3D > > RTE_SCHED_TYPE_ATOMIC; > > + response_info->flow_id =3D flow_id; > > + > > + p->da.dma_op[flow_id] =3D op; > > + } > > + > > + conf.event_port_cfg |=3D > > + RTE_EVENT_PORT_CFG_HINT_PRODUCER | > > + RTE_EVENT_PORT_CFG_HINT_CONSUMER; > > + > > + ret =3D rte_event_port_setup(opt->dev_id, port, &conf); > > + if (ret) { > > + evt_err("failed to setup port %d", port); > > + return ret; > > + } > > + > > prod++; > > } > > } else { > > @@ -1463,7 +1650,8 @@ perf_opt_check(struct evt_options *opt, > uint64_t > > nb_queues) > > > > if (opt->prod_type =3D=3D EVT_PROD_TYPE_SYNT || > > opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_TIMER_ADPTR || > > - opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR) { > > + opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR || > > + opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_DMA_ADPTR) { > > /* Validate producer lcores */ > > if (evt_lcores_has_overlap(opt->plcores, > > rte_get_main_lcore())) { > > @@ -1855,6 +2043,103 @@ perf_cryptodev_destroy(struct evt_test *test, > > struct evt_options *opt) > > rte_mempool_free(t->ca_vector_pool); > > } > > > > +int > > +perf_dmadev_setup(struct evt_test *test, struct evt_options *opt) { > > + const struct rte_dma_conf conf =3D { .nb_vchans =3D 1}; > > + const struct rte_dma_vchan_conf qconf =3D { > > + .direction =3D RTE_DMA_DIR_MEM_TO_MEM, > > + .nb_desc =3D 1024, > > + }; > > + struct test_perf *t =3D evt_test_priv(test); > > + uint8_t dma_dev_count, dma_dev_id; > > + unsigned int elt_size; > > + int ret; > > + > > + if (opt->prod_type !=3D EVT_PROD_TYPE_EVENT_DMA_ADPTR) > > + return 0; > > + > > + dma_dev_count =3D rte_dma_count_avail(); > > + if (dma_dev_count =3D=3D 0) { > > + evt_err("No dma devices available\n"); > > + return -ENODEV; > > + } > > + > > + elt_size =3D sizeof(struct rte_event_dma_adapter_op) + sizeof(struct > > rte_event); > > + t->da_op_pool =3D rte_mempool_create("dma_op_pool", opt->pool_sz, > > elt_size, 256, > > + 0, NULL, NULL, NULL, NULL, > > rte_socket_id(), 0); > > + if (t->da_op_pool =3D=3D NULL) { > > + evt_err("Failed to create dma op pool"); > > + return -ENOMEM; > > + } > > + > > + for (dma_dev_id =3D 0; dma_dev_id < dma_dev_count; dma_dev_id++) { >=20 > Since only dma_dev_id 0 is used, we can skip configuring the rest. >=20 > > + int vchan_id; > > + > > + ret =3D rte_dma_configure(dma_dev_id, &conf); > > + if (ret) { > > + evt_err("Failed to configure dma dev (%u)", > > dma_dev_id); > > + goto err; > > + } > > + > > + for (vchan_id =3D 0; vchan_id < conf.nb_vchans; vchan_id++) { > > + ret =3D rte_dma_vchan_setup(dma_dev_id, vchan_id, > > &qconf); > > + if (ret) { > > + evt_err("Failed to setup vchan on dma dev > > %u\n", > > + dma_dev_id); > > + goto err; > > + } > > + } > > + } > > + > > + return 0; > > +err: > > + for (dma_dev_id =3D 0; dma_dev_id < dma_dev_count; dma_dev_id++) > > + rte_dma_close(dma_dev_id); > > + > > + rte_mempool_free(t->da_op_pool); > > + > > + return ret; > > +} > > + > > +void > > +perf_dmadev_destroy(struct evt_test *test, struct evt_options *opt) { > > + uint8_t dma_dev_id, dma_dev_count =3D rte_dma_count_avail(); > > + struct test_perf *t =3D evt_test_priv(test); > > + uint16_t port; > > + > > + if (opt->prod_type !=3D EVT_PROD_TYPE_EVENT_DMA_ADPTR) > > + return; > > + > > + for (port =3D t->nb_workers; port < perf_nb_event_ports(opt); port++)= { > > + struct prod_data *p =3D &t->prod[port]; > > + struct rte_event_dma_adapter_op *op; > > + uint32_t flow_id; > > + > > + for (flow_id =3D 0; flow_id < t->nb_flows; flow_id++) { > > + op =3D p->da.dma_op[flow_id]; > > + > > + rte_pktmbuf_free((struct rte_mbuf *)(uintptr_t)op- > > >src_seg->addr); > > + rte_pktmbuf_free((struct rte_mbuf *)(uintptr_t)op- > > >dst_seg->addr); > > + rte_free(op->src_seg); > > + rte_free(op->dst_seg); > > + rte_mempool_put(op->op_mp, op); > > + } > > + > > + rte_event_dma_adapter_vchan_del(TEST_PERF_DA_ID, p- > > >da.dma_dev_id, p->da.vchan_id); > > + } > > + > > + rte_event_dma_adapter_free(TEST_PERF_DA_ID); > > + > > + for (dma_dev_id =3D 0; dma_dev_id < dma_dev_count; dma_dev_id++) { >=20 > Same as above. >=20 > > + rte_dma_stop(dma_dev_id); > > + rte_dma_close(dma_dev_id); > > + } > > + > > + rte_mempool_free(t->da_op_pool); > > +} > > + > > int > > perf_mempool_setup(struct evt_test *test, struct evt_options *opt) { > > diff --git a/app/test-eventdev/test_perf_common.h b/app/test- > > eventdev/test_perf_common.h index faedd471c6..2b4f572b7f 100644 > > --- a/app/test-eventdev/test_perf_common.h > > +++ b/app/test-eventdev/test_perf_common.h > > @@ -27,6 +27,7 @@ > > #include "evt_test.h" > > > > #define TEST_PERF_CA_ID 0 > > +#define TEST_PERF_DA_ID 0 > > > > struct test_perf; > > > > @@ -43,11 +44,19 @@ struct crypto_adptr_data { > > uint16_t cdev_qp_id; > > void **crypto_sess; > > }; > > + > > +struct dma_adptr_data { > > + uint8_t dma_dev_id; > > + uint16_t vchan_id; > > + void **dma_op; > > +}; > > + > > struct prod_data { > > uint8_t dev_id; > > uint8_t port_id; > > uint8_t queue_id; > > struct crypto_adptr_data ca; > > + struct dma_adptr_data da; > > struct test_perf *t; > > } __rte_cache_aligned; > > > > @@ -72,6 +81,7 @@ struct test_perf { > > struct rte_mempool *ca_sess_pool; > > struct rte_mempool *ca_asym_sess_pool; > > struct rte_mempool *ca_vector_pool; > > + struct rte_mempool *da_op_pool; > > } __rte_cache_aligned; > > > > struct perf_elt { > > @@ -95,9 +105,8 @@ struct perf_elt { > > const uint8_t port =3D w->port_id;\ > > const uint8_t prod_timer_type =3D \ > > opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_TIMER_ADPTR;\ > > - const uint8_t prod_crypto_type =3D \ > > - opt->prod_type =3D=3D > > EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR;\ > > uint8_t *const sched_type_list =3D &t->sched_type_list[0];\ > > + const enum evt_prod_type prod_type =3D opt->prod_type;\ > > struct rte_mempool *const pool =3D t->pool;\ > > const uint8_t nb_stages =3D t->opt->nb_stages;\ > > const uint8_t laststage =3D nb_stages - 1;\ @@ -206,9 +215,9 @@ > > perf_handle_crypto_vector_ev(struct rte_event *ev, struct perf_elt > > **pe, } > > > > static __rte_always_inline int > > -perf_process_last_stage(struct rte_mempool *const pool, uint8_t > > prod_crypto_type, > > - struct rte_event *const ev, struct worker_data *const w, > > - void *bufs[], int const buf_sz, uint8_t count) > > +perf_process_last_stage(struct rte_mempool *const pool, enum > > evt_prod_type prod_type, > > + struct rte_event *const ev, struct worker_data *const > > w, > > + void *bufs[], int const buf_sz, uint8_t count) > > { > > void *to_free_in_bulk; > > > > @@ -219,7 +228,7 @@ perf_process_last_stage(struct rte_mempool > *const > > pool, uint8_t prod_crypto_type > > rte_atomic_thread_fence(__ATOMIC_RELEASE); > > w->processed_pkts++; > > > > - if (prod_crypto_type) { > > + if (prod_type =3D=3D EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR) { > > struct rte_crypto_op *op =3D ev->event_ptr; > > struct rte_mbuf *m; > > > > @@ -234,6 +243,8 @@ perf_process_last_stage(struct rte_mempool > *const > > pool, uint8_t prod_crypto_type > > to_free_in_bulk =3D op->asym->modex.result.data; > > } > > rte_crypto_op_free(op); > > + } else if (prod_type =3D=3D EVT_PROD_TYPE_EVENT_DMA_ADPTR) { > > + return count; > > } else { > > to_free_in_bulk =3D ev->event_ptr; > > } > > @@ -248,9 +259,9 @@ perf_process_last_stage(struct rte_mempool > *const > > pool, uint8_t prod_crypto_type } > > > > static __rte_always_inline uint8_t > > -perf_process_last_stage_latency(struct rte_mempool *const pool, > > uint8_t prod_crypto_type, > > - struct rte_event *const ev, struct worker_data *const w, > > - void *bufs[], int const buf_sz, uint8_t count) > > +perf_process_last_stage_latency(struct rte_mempool *const pool, enum > > evt_prod_type prod_type, > > + struct rte_event *const ev, struct worker_data > > *const w, > > + void *bufs[], int const buf_sz, uint8_t count) > > { > > uint64_t latency; > > struct perf_elt *pe; > > @@ -262,7 +273,7 @@ perf_process_last_stage_latency(struct > rte_mempool > > *const pool, uint8_t prod_cry > > rte_atomic_thread_fence(__ATOMIC_RELEASE); > > w->processed_pkts++; > > > > - if (prod_crypto_type) { > > + if (prod_type =3D=3D EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR) { > > struct rte_crypto_op *op =3D ev->event_ptr; > > struct rte_mbuf *m; > > > > @@ -280,6 +291,8 @@ perf_process_last_stage_latency(struct > rte_mempool > > *const pool, uint8_t prod_cry > > to_free_in_bulk =3D op->asym->modex.result.data; > > } > > rte_crypto_op_free(op); > > + } else if (prod_type =3D=3D EVT_PROD_TYPE_EVENT_DMA_ADPTR) { > > + return count; > > } else { > > pe =3D ev->event_ptr; > > to_free_in_bulk =3D pe; > > @@ -346,6 +359,7 @@ int perf_opt_check(struct evt_options *opt, > > uint64_t nb_queues); int perf_test_setup(struct evt_test *test, > > struct evt_options *opt); int perf_ethdev_setup(struct evt_test > > *test, struct evt_options *opt); int perf_cryptodev_setup(struct > > evt_test *test, struct evt_options *opt); > > +int perf_dmadev_setup(struct evt_test *test, struct evt_options > > +*opt); > > int perf_mempool_setup(struct evt_test *test, struct evt_options > > *opt); int perf_event_dev_port_setup(struct evt_test *test, struct > evt_options *opt, > > uint8_t stride, uint8_t nb_queues, @@ - > 357,6 +371,7 @@ void > > perf_opt_dump(struct evt_options *opt, uint8_t nb_queues); void > > perf_test_destroy(struct evt_test *test, struct evt_options *opt); > > void perf_eventdev_destroy(struct evt_test *test, struct evt_options > > *opt); void perf_cryptodev_destroy(struct evt_test *test, struct > > evt_options *opt); > > +void perf_dmadev_destroy(struct evt_test *test, struct evt_options > > +*opt); > > void perf_ethdev_destroy(struct evt_test *test, struct evt_options > > *opt); void perf_ethdev_rx_stop(struct evt_test *test, struct > > evt_options *opt); void perf_mempool_destroy(struct evt_test *test, > > struct evt_options *opt); diff --git > > a/app/test-eventdev/test_perf_queue.c b/app/test- > > eventdev/test_perf_queue.c index 2399cfb69b..8b6b85c1ad 100644 > > --- a/app/test-eventdev/test_perf_queue.c > > +++ b/app/test-eventdev/test_perf_queue.c > > @@ -50,7 +50,8 @@ perf_queue_worker(void *arg, const int > > enable_fwd_latency) > > continue; > > } > > > > - if (prod_crypto_type && (ev.event_type =3D=3D > > RTE_EVENT_TYPE_CRYPTODEV)) { > > + if ((prod_type =3D=3D EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR) > > && > > + (ev.event_type =3D=3D RTE_EVENT_TYPE_CRYPTODEV)) { > > if (perf_handle_crypto_ev(&ev, &pe, > > enable_fwd_latency)) > > continue; > > } else { > > @@ -65,10 +66,10 @@ perf_queue_worker(void *arg, const int > > enable_fwd_latency) > > /* last stage in pipeline */ > > if (unlikely(stage =3D=3D laststage)) { > > if (enable_fwd_latency) > > - cnt =3D perf_process_last_stage_latency(pool, > > prod_crypto_type, > > + cnt =3D perf_process_last_stage_latency(pool, > > prod_type, > > &ev, w, bufs, sz, cnt); > > else > > - cnt =3D perf_process_last_stage(pool, > > prod_crypto_type, > > + cnt =3D perf_process_last_stage(pool, > > prod_type, > > &ev, w, bufs, sz, cnt); > > } else { > > fwd_event(&ev, sched_type_list, nb_stages); @@ - > 101,7 +102,8 @@ > > perf_queue_worker_burst(void *arg, const int > > enable_fwd_latency) > > } > > > > for (i =3D 0; i < nb_rx; i++) { > > - if (prod_crypto_type && (ev[i].event_type =3D=3D > > RTE_EVENT_TYPE_CRYPTODEV)) { > > + if ((prod_type =3D=3D > > EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR) && > > + (ev[i].event_type =3D=3D > > RTE_EVENT_TYPE_CRYPTODEV)) { > > if (perf_handle_crypto_ev(&ev[i], &pe, > > enable_fwd_latency)) > > continue; > > } > > @@ -118,9 +120,9 @@ perf_queue_worker_burst(void *arg, const int > > enable_fwd_latency) > > if (unlikely(stage =3D=3D laststage)) { > > if (enable_fwd_latency) > > cnt =3D > > perf_process_last_stage_latency(pool, > > - prod_crypto_type, &ev[i], w, > > bufs, sz, cnt); > > + prod_type, &ev[i], w, bufs, sz, > > cnt); > > else > > - cnt =3D perf_process_last_stage(pool, > > prod_crypto_type, > > + cnt =3D perf_process_last_stage(pool, > > prod_type, > > &ev[i], w, bufs, sz, cnt); > > > > ev[i].op =3D RTE_EVENT_OP_RELEASE; > > @@ -151,7 +153,7 @@ perf_queue_worker_vector(void *arg, const int > > enable_fwd_latency) > > > > RTE_SET_USED(sz); > > RTE_SET_USED(cnt); > > - RTE_SET_USED(prod_crypto_type); > > + RTE_SET_USED(prod_type); > > > > while (t->done =3D=3D false) { > > deq =3D rte_event_dequeue_burst(dev, port, &ev, 1, 0); @@ - > 346,6 > > +348,18 @@ perf_queue_eventdev_setup(struct evt_test *test, struct > > evt_options *opt) > > return ret; > > } > > } > > + } else if (opt->prod_type =3D=3D EVT_PROD_TYPE_EVENT_DMA_ADPTR) { > > + uint8_t dma_dev_id, dma_dev_count; > > + > > + dma_dev_count =3D rte_dma_count_avail(); > > + for (dma_dev_id =3D 0; dma_dev_id < dma_dev_count; > > dma_dev_id++) { >=20 > Since we only use the 1st dma_dev_id in fp, we should skip this loop. >=20 > > + ret =3D rte_dma_start(dma_dev_id); > > + if (ret) { > > + evt_err("Failed to start dmadev %u", > > + dma_dev_id); > > + return ret; > > + } > > + } > > } > > > > return 0; > > @@ -389,6 +403,7 @@ static const struct evt_test_ops perf_queue =3D { > > .mempool_setup =3D perf_mempool_setup, > > .ethdev_setup =3D perf_ethdev_setup, > > .cryptodev_setup =3D perf_cryptodev_setup, > > + .dmadev_setup =3D perf_dmadev_setup, > > .ethdev_rx_stop =3D perf_ethdev_rx_stop, > > .eventdev_setup =3D perf_queue_eventdev_setup, > > .launch_lcores =3D perf_queue_launch_lcores, > > @@ -396,6 +411,7 @@ static const struct evt_test_ops perf_queue =3D { > > .mempool_destroy =3D perf_mempool_destroy, > > .ethdev_destroy =3D perf_ethdev_destroy, > > .cryptodev_destroy =3D perf_cryptodev_destroy, > > + .dmadev_destroy =3D perf_dmadev_destroy, > > .test_result =3D perf_test_result, > > .test_destroy =3D perf_test_destroy, > > }; > > diff --git a/doc/guides/tools/testeventdev.rst > > b/doc/guides/tools/testeventdev.rst > > index 3fcc2c9894..a29afe2cb2 100644 > > --- a/doc/guides/tools/testeventdev.rst > > +++ b/doc/guides/tools/testeventdev.rst >=20 > Please Add example command >=20 > > @@ -124,6 +124,10 @@ The following are the application command-line > > options: > > > > Use crypto device as producer. > > > > +* ``--prod_type_dmadev`` > > + > > + Use dma device as producer. > > + > > * ``--timer_tick_nsec`` > > > > Used to dictate number of nano seconds between bucket > > traversal of the @@ -157,6 +161,11 @@ The following are the > > application command-line > > options: > > Set crypto adapter mode. Use 0 for OP_NEW (default) and 1 for > > OP_FORWARD mode. > > > > +* ``--dma_adptr_mode`` > > + > > + Set dma adapter mode. Use 0 for OP_NEW (default) and 1 for > > + OP_FORWARD mode. > > + > > * ``--crypto_op_type`` > > > > Set crypto operation type. Use 0 for symmetric crypto ops > > (default) @@ -459,6 +468,7 @@ Supported application command line > > options are > > following:: > > --prod_type_timerdev_burst > > --prod_type_timerdev > > --prod_type_cryptodev > > + --prod_type_dmadev > > --prod_enq_burst_sz > > --timer_tick_nsec > > --max_tmo_nsec > > @@ -467,6 +477,7 @@ Supported application command line options are > > following:: > > --nb_timer_adptrs > > --deq_tmo_nsec > > --crypto_adptr_mode > > + --dma_adptr_mode > > > > Example > > ^^^^^^^ > > @@ -570,6 +581,7 @@ Supported application command line options are > > following:: > > --prod_type_timerdev_burst > > --prod_type_timerdev > > --prod_type_cryptodev > > + --prod_type_dmadev > > --timer_tick_nsec > > --max_tmo_nsec > > --expiry_nsec > > @@ -577,6 +589,7 @@ Supported application command line options are > > following:: > > --nb_timer_adptrs > > --deq_tmo_nsec > > --crypto_adptr_mode > > + --dma_adptr_mode > > > > Example > > ^^^^^^^ > > -- > > 2.34.1