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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SA0PR11MB4575.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7f8f5bf8-3380-4628-39e5-08da2786a482 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Apr 2022 13:14:06.5132 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: vuKPjdiePzqXGnzKjr6UP/NbPsXSS4oIMcKB+qJCboetV7ylhIU3fe1zP2V5UBLLxpXiRnyJ9nr0WIqm99lEIw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR11MB4325 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Zhang, Qi Z > Sent: Friday, April 8, 2022 7:24 PM > To: Yang, Qiming ; Wu, Wenjun1 > > Cc: dev@dpdk.org; Zhang, Qi Z > Subject: [PATCH v2] net/ice: optimize max queue number calculation >=20 > Remove the limitation that max queue pair number must be 2^n. > With this patch, even on a 8 ports device, the max queue pair number > increased from 128 to 254. >=20 > Signed-off-by: Qi Zhang > --- >=20 > v2: > - fix check patch warning >=20 > drivers/net/ice/ice_ethdev.c | 24 ++++++++++++++++++++---- > 1 file changed, 20 insertions(+), 4 deletions(-) >=20 > diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c = index > 73e550f5fb..ff2b3e45d9 100644 > --- a/drivers/net/ice/ice_ethdev.c > +++ b/drivers/net/ice/ice_ethdev.c > @@ -819,10 +819,26 @@ ice_vsi_config_tc_queue_mapping(struct ice_vsi > *vsi, > return -ENOTSUP; > } >=20 > - vsi->nb_qps =3D RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC); > - fls =3D (vsi->nb_qps =3D=3D 0) ? 0 : rte_fls_u32(vsi->nb_qps) - 1; > - /* Adjust the queue number to actual queues that can be applied */ > - vsi->nb_qps =3D (vsi->nb_qps =3D=3D 0) ? 0 : 0x1 << fls; > + /* vector 0 is reserved and 1 vector for ctrl vsi */ > + if (vsi->adapter->hw.func_caps.common_cap.num_msix_vectors < 2) > + vsi->nb_qps =3D 0; > + else > + vsi->nb_qps =3D RTE_MIN > + ((uint16_t)vsi->adapter- > >hw.func_caps.common_cap.num_msix_vectors - 2, > + RTE_MIN(vsi->nb_qps, ICE_MAX_Q_PER_TC)); > + > + /* nb_qps(hex) -> fls */ > + /* 0000 -> 0 */ > + /* 0001 -> 0 */ > + /* 0002 -> 1 */ > + /* 0003 ~ 0004 -> 2 */ > + /* 0005 ~ 0008 -> 3 */ > + /* 0009 ~ 0010 -> 4 */ > + /* 0011 ~ 0020 -> 5 */ > + /* 0021 ~ 0040 -> 6 */ > + /* 0041 ~ 0080 -> 7 */ > + /* 0081 ~ 0100 -> 8 */ > + fls =3D (vsi->nb_qps =3D=3D 0) ? 0 : rte_fls_u32(vsi->nb_qps - 1); >=20 > qp_idx =3D 0; > /* Set tc and queue mapping with VSI */ > -- > 2.26.2 Acked-by: Wenjun Wu < wenjun1.wu@intel.com> Thanks Wenjun