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Tue, 27 Apr 2021 06:07:01 +0000 From: "Jiang, Cheng1" To: "Hu, Jiayu" , "maxime.coquelin@redhat.com" , "Xia, Chenbo" CC: "dev@dpdk.org" , "Yang, YvonneX" , "Wang, Yinan" , "Liu, Yong" Thread-Topic: [PATCH v8 2/4] vhost: add support for packed ring in async vhost Thread-Index: AQHXNPsicmYY9eQgRUqZEGcnqXdP4arH3veAgAADHUA= Date: Tue, 27 Apr 2021 06:07:00 +0000 Message-ID: References: <20210317085426.10119-1-Cheng1.jiang@intel.com> <20210419085104.47078-1-Cheng1.jiang@intel.com> <20210419085104.47078-3-Cheng1.jiang@intel.com> In-Reply-To: Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.55.46.54] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 5fab9c49-5090-4a07-df2f-08d90942ac31 x-ms-traffictypediagnostic: BYAPR11MB3061: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:2000; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR11MB5006.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5fab9c49-5090-4a07-df2f-08d90942ac31 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Apr 2021 06:07:01.0091 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: XSrip6EGtIu1Y72VBeVSuZTr6dwwjWzbdd0Wlgxy/uCAFwGTRT8b8XKFnWKEYl5Ob1yDCfhCWf0YmvG+CflvOQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3061 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v8 2/4] vhost: add support for packed ring in async vhost X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Jiayu, > -----Original Message----- > From: Hu, Jiayu > Sent: Tuesday, April 27, 2021 1:16 PM > To: Jiang, Cheng1 ; maxime.coquelin@redhat.com; > Xia, Chenbo > Cc: dev@dpdk.org; Yang, YvonneX ; Wang, Yinan > ; Liu, Yong > Subject: RE: [PATCH v8 2/4] vhost: add support for packed ring in async v= host >=20 > Hi Cheng, >=20 > Some comments are inline. >=20 > > -----Original Message----- > > From: Jiang, Cheng1 > > Sent: Monday, April 19, 2021 4:51 PM > > To: maxime.coquelin@redhat.com; Xia, Chenbo > > Cc: dev@dpdk.org; Hu, Jiayu ; Yang, YvonneX > > ; Wang, Yinan ; Liu, > > Yong ; Jiang, Cheng1 > > Subject: [PATCH v8 2/4] vhost: add support for packed ring in async > > vhost > > > > For now async vhost data path only supports split ring. This patch > > enables packed ring in async vhost data path to make async vhost > > compatible with virtio 1.1 spec. > > > > Signed-off-by: Cheng Jiang > > --- > > lib/librte_vhost/rte_vhost_async.h | 1 + > > lib/librte_vhost/vhost.c | 79 ++++-- > > lib/librte_vhost/vhost.h | 15 +- > > lib/librte_vhost/virtio_net.c | 441 +++++++++++++++++++++++++++-- > > 4 files changed, 488 insertions(+), 48 deletions(-) > > > > diff --git a/lib/librte_vhost/virtio_net.c > > b/lib/librte_vhost/virtio_net.c index 438bdafd1..ce88ad3c0 100644 > > --- a/lib/librte_vhost/virtio_net.c > > +++ b/lib/librte_vhost/virtio_net.c > > @@ -363,14 +363,14 @@ > > vhost_shadow_dequeue_single_packed_inorder(struct vhost_virtqueue > *vq, > > } > > > > static __rte_always_inline void > > -vhost_shadow_enqueue_single_packed(struct virtio_net *dev, > > - struct vhost_virtqueue *vq, > > - uint32_t len[], > > - uint16_t id[], > > - uint16_t count[], > > +vhost_shadow_enqueue_packed(struct vhost_virtqueue *vq, > > + uint32_t *len, > > + uint16_t *id, > > + uint16_t *count, > > uint16_t num_buffers) > > { > > uint16_t i; > > + > > for (i =3D 0; i < num_buffers; i++) { > > /* enqueue shadow flush action aligned with batch num */ if > > (!vq->shadow_used_idx) @@ -382,6 +382,17 @@ > > vhost_shadow_enqueue_single_packed(struct > > virtio_net *dev, > > vq->shadow_aligned_idx +=3D count[i]; > > vq->shadow_used_idx++; > > } > > +} > > + > > +static __rte_always_inline void > > +vhost_shadow_enqueue_single_packed(struct virtio_net *dev, > > + struct vhost_virtqueue *vq, > > + uint32_t *len, > > + uint16_t *id, > > + uint16_t *count, > > + uint16_t num_buffers) > > +{ > > +vhost_shadow_enqueue_packed(vq, len, id, count, num_buffers); > > > > if (vq->shadow_aligned_idx >=3D PACKED_BATCH_SIZE) { > > do_data_copy_enqueue(dev, vq); @@ -1474,6 +1485,23 @@ > > store_dma_desc_info_split(struct vring_used_elem *s_ring, struct > > vring_used_elem } } > > > > +static __rte_always_inline void > > +store_dma_desc_info_packed(struct vring_used_elem_packed *s_ring, > > +struct vring_used_elem_packed *d_ring, uint16_t ring_size, uint16_t > > +s_idx, uint16_t d_idx, uint16_t > > count) > > +{ > > +uint16_t elem_size =3D sizeof(struct vring_used_elem_packed); > > + > > +if (d_idx + count <=3D ring_size) { > > +rte_memcpy(d_ring + d_idx, s_ring + s_idx, count * > > elem_size); > > +} else { > > +uint16_t size =3D ring_size - d_idx; > > + > > +rte_memcpy(d_ring + d_idx, s_ring + s_idx, size * elem_size); > > +rte_memcpy(d_ring, s_ring + s_idx + size, (count - size) * > > elem_size); > > +} > > +} > > + > > static __rte_noinline uint32_t > > virtio_dev_rx_async_submit_split(struct virtio_net *dev, struct > > vhost_virtqueue *vq, uint16_t queue_id, @@ -1556,12 +1584,12 @@ > > virtio_dev_rx_async_submit_split(struct > > virtio_net *dev, > > * descriptors. > > */ > > from =3D vq->shadow_used_idx - num_buffers; -to =3D vq->async_desc_idx= & > > (vq->size - 1); > > +to =3D vq->async_desc_idx_split & (vq->size - 1); > > > > store_dma_desc_info_split(vq->shadow_used_split, > > vq->async_descs_split, vq->size, from, to, num_buffers); > > > > -vq->async_desc_idx +=3D num_buffers; > > +vq->async_desc_idx_split +=3D num_buffers; > > vq->shadow_used_idx -=3D num_buffers; > > } else > > comp_pkts[num_done_pkts++] =3D pkts[pkt_idx]; @@ -1619,7 +1647,7 @@ > > virtio_dev_rx_async_submit_split(struct virtio_net *dev, num_descs += =3D > > pkts_info[slot_idx & (vq->size - 1)].descs; slot_idx--; } > > -vq->async_desc_idx -=3D num_descs; > > +vq->async_desc_idx_split -=3D num_descs; > > /* recover shadow used ring and available ring */ > > vq->shadow_used_idx -=3D (vq->last_avail_idx - > > > > async_pkts_log[num_async_pkts].last_avail_idx - @@ -1641,6 +1669,329 > > @@ virtio_dev_rx_async_submit_split(struct > > virtio_net *dev, > > return pkt_idx; > > } > > > > +static __rte_always_inline void > > +vhost_update_used_packed(struct vhost_virtqueue *vq, struct > > +vring_used_elem_packed *shadow_ring, uint16_t count) { int i; > > +uint16_t used_idx =3D vq->last_used_idx; uint16_t head_idx =3D > > +vq->last_used_idx; uint16_t head_flags =3D 0; > > + > > +if (count =3D=3D 0) > > +return; > > + > > +/* Split loop in two to save memory barriers */ for (i =3D 0; i < > > +count; i++) { > > +vq->desc_packed[used_idx].id =3D shadow_ring[i].id; > > +vq->desc_packed[used_idx].len =3D shadow_ring[i].len; > > + > > +used_idx +=3D shadow_ring[i].count; > > +if (used_idx >=3D vq->size) > > +used_idx -=3D vq->size; > > +} > > + > > +/* The ordering for storing desc flags needs to be enforced. */ > > +rte_atomic_thread_fence(__ATOMIC_RELEASE); > > + > > +for (i =3D 0; i < count; i++) { > > +uint16_t flags; > > + > > +if (vq->shadow_used_packed[i].len) > > +flags =3D VRING_DESC_F_WRITE; > > +else > > +flags =3D 0; > > + > > +if (vq->used_wrap_counter) { > > +flags |=3D VRING_DESC_F_USED; > > +flags |=3D VRING_DESC_F_AVAIL; > > +} else { > > +flags &=3D ~VRING_DESC_F_USED; > > +flags &=3D ~VRING_DESC_F_AVAIL; > > +} > > + > > +if (i > 0) { > > +vq->desc_packed[vq->last_used_idx].flags =3D flags; > > +} else { > > +head_idx =3D vq->last_used_idx; > > +head_flags =3D flags; > > +} > > + > > +vq_inc_last_used_packed(vq, shadow_ring[i].count); } > > + > > +vq->desc_packed[head_idx].flags =3D head_flags; > > +} > > + > > +static __rte_always_inline int > > +vhost_enqueue_async_single_packed(struct virtio_net *dev, > > + struct vhost_virtqueue *vq, > > + struct rte_mbuf *pkt, > > + struct buf_vector *buf_vec, > > + uint16_t *nr_descs, > > + uint16_t *nr_buffers, > > + struct vring_packed_desc *async_descs, > > + struct iovec *src_iovec, struct iovec *dst_iovec, > > + struct rte_vhost_iov_iter *src_it, > > + struct rte_vhost_iov_iter *dst_it) { uint16_t nr_vec =3D 0; > > +uint16_t avail_idx =3D vq->last_avail_idx; uint16_t max_tries, tries = =3D > > +0; uint16_t buf_id =3D 0; uint32_t len =3D 0; uint16_t desc_count =3D = 0; > > +uint32_t size =3D pkt->pkt_len + sizeof(struct > > virtio_net_hdr_mrg_rxbuf); > > +uint32_t buffer_len[vq->size]; > > +uint16_t buffer_buf_id[vq->size]; > > +uint16_t buffer_desc_count[vq->size]; *nr_buffers =3D 0; > nr_buffers and nr_descs are pointers of num_buffers and num_desc in > virtio_dev_rx_async_submit_packed(), and num_buffers and num_desc > don't have init values. I think you need to init them before pass their p= ointers > to another function, as it will read/update values pointed by the pointer= s. >=20 > In addition, *nr_buffers is set to 0, but *nr_descs is not, and both of t= hem > are set to > 0 in virtio_dev_rx_async_single_packed(). It looks strange. Sure, I'll init them in virtio_dev_rx_async_submit_packed(). >=20 > > + > > +if (rxvq_is_mergeable(dev)) > > +max_tries =3D vq->size - 1; > > +else > > +max_tries =3D 1; > > + > > +while (size > 0) { > > +/* > > + * if we tried all available ring items, and still > > + * can't get enough buf, it means something abnormal > > + * happened. > > + */ > > +if (unlikely(++tries > max_tries)) > > +return -1; > > + > > +if (unlikely(fill_vec_buf_packed(dev, vq, avail_idx, > > &desc_count, buf_vec, &nr_vec, > > +&buf_id, &len, > > VHOST_ACCESS_RW) < 0)) > > +return -1; > > + > > +len =3D RTE_MIN(len, size); > > +size -=3D len; > > + > > +buffer_len[*nr_buffers] =3D len; > > +buffer_buf_id[*nr_buffers] =3D buf_id; > > +buffer_desc_count[*nr_buffers] =3D desc_count; *nr_buffers +=3D 1; > > + > > +*nr_descs +=3D desc_count; > > +avail_idx +=3D desc_count; > > +if (avail_idx >=3D vq->size) > > +avail_idx -=3D vq->size; > > +} > > + > > +if (async_mbuf_to_desc(dev, vq, pkt, buf_vec, nr_vec, *nr_buffers, > > src_iovec, dst_iovec, > > +src_it, dst_it) < 0) > > +return -1; > > +/* store descriptors for DMA */ > > +if (avail_idx >=3D *nr_descs) { > > +rte_memcpy(async_descs, &vq->desc_packed[vq- > > >last_avail_idx], > > +*nr_descs * sizeof(struct vring_packed_desc)); } else { uint16_t > > +nr_copy =3D vq->size - vq->last_avail_idx; >=20 > It needs a blank line. OK. >=20 > > +rte_memcpy(async_descs, &vq->desc_packed[vq- > > >last_avail_idx], > > +nr_copy * sizeof(struct vring_packed_desc)); rte_memcpy(async_descs + > > +nr_copy, vq->desc_packed, (*nr_descs - nr_copy) * sizeof(struct > > vring_packed_desc)); > > +} > > + > > +vhost_shadow_enqueue_packed(vq, buffer_len, buffer_buf_id, > > buffer_desc_count, *nr_buffers); > > + > > +return 0; > > +} > > + > > +static __rte_always_inline int16_t > > +virtio_dev_rx_async_single_packed(struct virtio_net *dev, struct > > vhost_virtqueue *vq, > > + struct rte_mbuf *pkt, uint16_t *nr_descs, uint16_t > > *nr_buffers, > > + struct vring_packed_desc *async_descs, > > + struct iovec *src_iovec, struct iovec *dst_iovec, > > + struct rte_vhost_iov_iter *src_it, struct > > rte_vhost_iov_iter *dst_it) > > +{ > > +struct buf_vector buf_vec[BUF_VECTOR_MAX]; *nr_descs =3D 0; > *nr_buffers > > +=3D 0; > > + > > +if (unlikely(vhost_enqueue_async_single_packed(dev, vq, pkt, > > buf_vec, nr_descs, nr_buffers, > > + async_descs, src_iovec, > > dst_iovec, > > + src_it, dst_it) < 0)) { > > +VHOST_LOG_DATA(DEBUG, "(%d) failed to get enough desc > > from vring\n", dev->vid); > > +return -1; > > +} > > + > > +VHOST_LOG_DATA(DEBUG, "(%d) current index %d | end > > index %d\n", > > +dev->vid, vq->last_avail_idx, vq->last_avail_idx + > > *nr_descs); > > + > > +return 0; > > +} > > + > > +static __rte_always_inline void > > +dma_error_handler_packed(struct vhost_virtqueue *vq, struct > > vring_packed_desc *async_descs, > > +uint16_t async_descs_idx, uint16_t slot_idx, uint32_t > > nr_err, > > +uint32_t *pkt_idx, uint32_t *num_async_pkts, > > uint32_t *num_done_pkts) > > +{ > > +uint16_t descs_err =3D 0; > > +uint16_t buffers_err =3D 0; > > +struct async_inflight_info *pkts_info =3D vq->async_pkts_info; > > + > > +*num_async_pkts -=3D nr_err; > > +*pkt_idx -=3D nr_err; > > +/* calculate the sum of buffers and descs of DMA-error packets. */ > > +while (nr_err-- > 0) { descs_err +=3D pkts_info[slot_idx % > > +vq->size].descs; buffers_err +=3D pkts_info[slot_idx % > > +vq->size].nr_buffers; slot_idx--; } > > + > > +vq->async_buffer_idx_packed -=3D buffers_err; > > + > > +if (vq->last_avail_idx >=3D descs_err) { > > +vq->last_avail_idx -=3D descs_err; > > + > > +rte_memcpy(&vq->desc_packed[vq->last_avail_idx], > > +&async_descs[async_descs_idx - descs_err], descs_err * sizeof(struct > > +vring_packed_desc)); } else { uint16_t nr_copy; > > + > > +vq->last_avail_idx =3D vq->last_avail_idx + vq->size - descs_err; > > +nr_copy =3D vq->size - vq->last_avail_idx; > > +rte_memcpy(&vq->desc_packed[vq->last_avail_idx], > > +&async_descs[async_descs_idx - descs_err], nr_copy * sizeof(struct > > +vring_packed_desc)); descs_err -=3D nr_copy; > > +rte_memcpy(&vq->desc_packed[0], > > &async_descs[async_descs_idx - descs_err], > > +descs_err * sizeof(struct vring_packed_desc)); > > +vq->avail_wrap_counter ^=3D 1; > > +} > > + > > +*num_done_pkts =3D *pkt_idx - *num_async_pkts; } > > + > > +static __rte_noinline uint32_t > > +virtio_dev_rx_async_submit_packed(struct virtio_net *dev, struct > > +vhost_virtqueue *vq, uint16_t queue_id, struct rte_mbuf **pkts, > > +uint32_t count, struct rte_mbuf **comp_pkts, uint32_t *comp_count) { > > +uint32_t pkt_idx =3D 0, pkt_burst_idx =3D 0; uint16_t async_descs_idx = =3D > > +0; uint16_t num_buffers; uint16_t num_desc; > How about using "num_descs" to make naming consist with "num_buffers"? Sure, that make sense, thanks a lot. Cheng >=20 > Thanks, > Jiayu