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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR11MB6694.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7e857e7a-46f3-403c-f6eb-08dc7b5635df X-MS-Exchange-CrossTenant-originalarrivaltime: 23 May 2024 18:28:58.0998 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: kbJT5QtZsOXlT6UyuK+Fhk1cUkJGZza7cFjmrCEt7ppq5VrTUsCW6TTIGtkSDiUiLHI/uxf7dlV/b4PmggaPfPBc9iVPm5ctFF6YfFuWJF0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR11MB8490 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Stephen,=20 Still issue with indentation inconsistencies below.=20 Thanks Nic > -----Original Message----- > From: Stephen Hemminger > Sent: Tuesday, May 21, 2024 8:28 PM > To: dev@dpdk.org > Cc: Stephen Hemminger ; Chautru, Nicolas > ; Gagandeep Singh ; > Hemant Agrawal > Subject: [PATCH v5 16/32] baseband: replace use of fixed size rte_memcpy >=20 > Automatically generated by devtools/cocci/rte_memcpy.cocci >=20 > Signed-off-by: Stephen Hemminger > --- > drivers/baseband/acc/rte_acc100_pmd.c | 16 +++++++--------- > drivers/baseband/acc/rte_vrb_pmd.c | 21 ++++++++++----------- > drivers/baseband/la12xx/bbdev_la12xx.c | 4 ++-- > 3 files changed, 19 insertions(+), 22 deletions(-) >=20 > diff --git a/drivers/baseband/acc/rte_acc100_pmd.c > b/drivers/baseband/acc/rte_acc100_pmd.c > index ee50b9c60c..4a929d9cfa 100644 > --- a/drivers/baseband/acc/rte_acc100_pmd.c > +++ b/drivers/baseband/acc/rte_acc100_pmd.c > @@ -2975,15 +2975,13 @@ enqueue_ldpc_dec_one_op_cb(struct > acc_queue *q, struct rte_bbdev_dec_op *op, > uint8_t *prev_ptr =3D (uint8_t *) prev_desc; > uint8_t *new_ptr =3D (uint8_t *) desc; > /* Copy first 4 words and BDESCs */ > - rte_memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0); > - rte_memcpy(new_ptr + ACC_5GUL_OFFSET_0, > - prev_ptr + ACC_5GUL_OFFSET_0, > - ACC_5GUL_SIZE_1); > + memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0); > + memcpy(new_ptr + ACC_5GUL_OFFSET_0, > + prev_ptr + ACC_5GUL_OFFSET_0, ACC_5GUL_SIZE_1); > desc->req.op_addr =3D prev_desc->req.op_addr; > /* Copy FCW */ > - rte_memcpy(new_ptr + ACC_DESC_FCW_OFFSET, > - prev_ptr + ACC_DESC_FCW_OFFSET, > - ACC_FCW_LD_BLEN); > + memcpy(new_ptr + ACC_DESC_FCW_OFFSET, > + prev_ptr + ACC_DESC_FCW_OFFSET, > ACC_FCW_LD_BLEN); > acc100_dma_desc_ld_update(op, &desc->req, input, > h_output, > &in_offset, &h_out_offset, > &h_out_length, harq_layout); > @@ -3130,7 +3128,7 @@ enqueue_ldpc_dec_one_op_tb(struct acc_queue > *q, struct rte_bbdev_dec_op *op, > desc =3D acc_desc(q, total_enqueued_cbs); > desc->req.data_ptrs[0].address =3D q->ring_addr_iova + > fcw_offset; > desc->req.data_ptrs[0].blen =3D ACC_FCW_LD_BLEN; > - rte_memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, > ACC_FCW_LD_BLEN); > + memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, > ACC_FCW_LD_BLEN); > ret =3D acc100_dma_desc_ld_fill(op, &desc->req, &input, > h_output, &in_offset, &h_out_offset, > &h_out_length, > @@ -4430,7 +4428,7 @@ acc100_configure(const char *dev_name, struct > rte_acc_conf *conf) > struct acc_device *d =3D bbdev->data->dev_private; >=20 > /* Store configuration */ > - rte_memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); > + memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); >=20 > value =3D acc_reg_read(d, HwPfPcieGpexBridgeControl); > bool firstCfg =3D (value !=3D ACC100_CFG_PCI_BRIDGE); diff --git > a/drivers/baseband/acc/rte_vrb_pmd.c > b/drivers/baseband/acc/rte_vrb_pmd.c > index 585dc49bd6..bb11ff887a 100644 > --- a/drivers/baseband/acc/rte_vrb_pmd.c > +++ b/drivers/baseband/acc/rte_vrb_pmd.c > @@ -2450,15 +2450,13 @@ vrb_enqueue_ldpc_dec_one_op_cb(struct > acc_queue *q, struct rte_bbdev_dec_op *op, > uint8_t *prev_ptr =3D (uint8_t *) prev_desc; > uint8_t *new_ptr =3D (uint8_t *) desc; > /* Copy first 4 words and BDESCs. */ > - rte_memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0); > - rte_memcpy(new_ptr + ACC_5GUL_OFFSET_0, > - prev_ptr + ACC_5GUL_OFFSET_0, > - ACC_5GUL_SIZE_1); > + memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0); > + memcpy(new_ptr + ACC_5GUL_OFFSET_0, > + prev_ptr + ACC_5GUL_OFFSET_0, ACC_5GUL_SIZE_1); > desc->req.op_addr =3D prev_desc->req.op_addr; > /* Copy FCW. */ > - rte_memcpy(new_ptr + ACC_DESC_FCW_OFFSET, > - prev_ptr + ACC_DESC_FCW_OFFSET, > - ACC_FCW_LD_BLEN); > + memcpy(new_ptr + ACC_DESC_FCW_OFFSET, > + prev_ptr + ACC_DESC_FCW_OFFSET, > ACC_FCW_LD_BLEN); > vrb_dma_desc_ld_update(op, &desc->req, input, h_output, > &in_offset, &h_out_offset, > &h_out_length, harq_layout); > @@ -2566,7 +2564,8 @@ vrb_enqueue_ldpc_dec_one_op_tb(struct > acc_queue *q, struct rte_bbdev_dec_op *op, > fcw_offset =3D (desc_idx << 8) + ACC_DESC_FCW_OFFSET; > desc->req.data_ptrs[0].address =3D q->ring_addr_iova + > fcw_offset; > desc->req.data_ptrs[0].blen =3D ACC_FCW_LD_BLEN; > - rte_memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, > ACC_FCW_LD_BLEN); > + memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, > + ACC_FCW_LD_BLEN); > desc->req.fcw_ld.tb_trailer_size =3D (c - r - 1) * trail_len; > ret =3D vrb_dma_desc_ld_fill(op, &desc->req, &input, > h_output, &in_offset, &h_out_offset, @@ - > 4002,7 +4001,7 @@ enqueue_mldts_split_op(struct acc_queue *q, struct > rte_bbdev_mldts_op *op, > if (symb =3D=3D 0) > desc->req.cbs_in_tb =3D num_syms; > else > - rte_memcpy(&desc->req.fcw_mldts, fcw, > ACC_FCW_MLDTS_BLEN); > + memcpy(&desc->req.fcw_mldts, fcw, > ACC_FCW_MLDTS_BLEN); > desc->req.data_ptrs[1].address =3D > rte_pktmbuf_iova_offset(input_q, in_offset); > desc->req.data_ptrs[1].blen =3D q_size; > in_offset +=3D q_size; > @@ -4352,7 +4351,7 @@ vrb1_configure(const char *dev_name, struct > rte_acc_conf *conf) > struct acc_device *d =3D bbdev->data->dev_private; >=20 > /* Store configuration. */ > - rte_memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); > + memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); >=20 > /* Check we are already out of PG. */ > status =3D acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck); @@ - > 4759,7 +4758,7 @@ vrb2_configure(const char *dev_name, struct > rte_acc_conf *conf) > struct acc_device *d =3D bbdev->data->dev_private; >=20 > /* Store configuration. */ > - rte_memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); > + memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); >=20 > /* Explicitly releasing AXI as this may be stopped after PF FLR/BME. > */ > address =3D VRB2_PfDmaAxiControl; > diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c > b/drivers/baseband/la12xx/bbdev_la12xx.c > index bb754a5395..23e2fdb811 100644 > --- a/drivers/baseband/la12xx/bbdev_la12xx.c > +++ b/drivers/baseband/la12xx/bbdev_la12xx.c > @@ -597,8 +597,8 @@ dequeue_single_op(struct bbdev_la12xx_q_priv > *q_priv, void *dst) >=20 > op =3D q_priv->bbdev_op[ci]; >=20 > - rte_memcpy(dst, q_priv->msg_ch_vaddr[ci], > - sizeof(struct bbdev_ipc_enqueue_op)); > + memcpy(dst, q_priv->msg_ch_vaddr[ci], > + sizeof(struct bbdev_ipc_enqueue_op)); >=20 > /* Move Consumer Index forward */ > ci++; > -- > 2.43.0