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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR12MB5405.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 93f5abfe-ebc9-4a61-2089-08db712cd2cf X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Jun 2023 01:22:33.2280 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: LM9Voa2+nV0uPJy+SjpHKtC9yD2dR5c+ZAzrIa6hwb8vRd/cJxkkSXDUjyBOj9ootjd4Ni+MpLHKFI4S16M5dQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8053 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi, Sorry for the late response. > -----Original Message----- > From: Akhil Goyal > Sent: Thursday, June 15, 2023 2:12 AM > To: Suanming Mou > Cc: dev@dpdk.org; Raslan Darawsheh > Subject: RE: [EXT] [PATCH v2 0/9] crypto/mlx5: support AES-GCM >=20 > > AES-GCM provides both authenticated encryption and the ability to > > check the integrity and authentication of additional authenticated > > data (AAD) that is sent in the clear. > > > > The crypto operations are performed with crypto WQE. If the input > > buffers(AAD, mbuf, digest) are not contiguous and there is no enough > > headroom or tailroom for AAD or digest, as the requirement from FW, an > > UMR WQE is needed to generate contiguous address space for crypto WQE. > > The UMR WQE and crypto WQE are handled in two different QPs. > > > > The QP for UMR operation contains two types of WQE, UMR and SEND_EN > > WQE. The WQEs are built dynamically according to the crypto operation > > buffer address. Crypto operation with non-contiguous buffers will have > > its own UMR WQE, while the operation with contiguous buffers doesn't > > need the UMR WQE. Once the all the operations WQE in the enqueue burst > > built finishes, if any UMR WQEs are built, additional SEND_EN WQE will > > be as the final WQE of the burst in the UMR QP. > > The purpose of that SEND_EN WQE is to trigger the crypto QP processing > > with the UMR ready input memory address space buffers. > > > > The QP for crypto operations contains only the crypto WQE and the QP > > WQEs are built as fixed in QP setup. The QP processing is triggered by > > doorbell ring or the SEND_EN WQE from UMR QP. > > \ > Change log missing. Wii updated in V3. >=20 > Please get it reviewed from PMD maintainer. > Also rebase the patchset, and fix checkpatch issues. The checkpatch issues are mainly due to the struct names false positive. >=20 >=20 > > Suanming Mou (9): > > common/mlx5: export memory region lookup by address > > crypto/mlx5: split AES-XTS > > crypto/mlx5: add AES-GCM query and initialization > > crypto/mlx5: add AES-GCM encryption key > > crypto/mlx5: add AES-GCM session configure > > common/mlx5: add WQE-based QP synchronous basics > > crypto/mlx5: add queue pair setup for GCM > > crypto/mlx5: add enqueue and dequeue operations > > crypto/mlx5: enable AES-GCM capability > > > > doc/guides/cryptodevs/mlx5.rst | 48 +- > > doc/guides/rel_notes/release_23_07.rst | 1 + > > drivers/common/mlx5/mlx5_common_mr.c | 2 +- > > drivers/common/mlx5/mlx5_common_mr.h | 5 + > > drivers/common/mlx5/mlx5_devx_cmds.c | 21 + > > drivers/common/mlx5/mlx5_devx_cmds.h | 16 + > > drivers/common/mlx5/mlx5_prm.h | 65 +- > > drivers/common/mlx5/version.map | 3 + > > drivers/crypto/mlx5/meson.build | 2 + > > drivers/crypto/mlx5/mlx5_crypto.c | 673 ++--------------- > > drivers/crypto/mlx5/mlx5_crypto.h | 101 ++- > > drivers/crypto/mlx5/mlx5_crypto_dek.c | 102 ++- > > drivers/crypto/mlx5/mlx5_crypto_gcm.c | 995 +++++++++++++++++++++++++ > > drivers/crypto/mlx5/mlx5_crypto_xts.c | 645 ++++++++++++++++ > > 14 files changed, 2014 insertions(+), 665 deletions(-) create mode > > 100644 drivers/crypto/mlx5/mlx5_crypto_gcm.c > > create mode 100644 drivers/crypto/mlx5/mlx5_crypto_xts.c > > > > -- > > 2.25.1