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Fri, 4 Oct 2024 11:04:15 +0000 From: Amit Prakash Shukla To: Vidya Sagar Velumuri , "fengchengwen@huawei.com" , "kevin.laatz@intel.com" , "bruce.richardson@intel.com" CC: Jerin Jacob , Anoob Joseph , Aakash Sasidharan , Tejasree Kondoj , Gowrishankar Muthukrishnan , "dev@dpdk.org" Subject: Re: [EXTERNAL] [PATCH v2 1/2] test/dma: update the sg test to verify wrap around case Thread-Topic: [EXTERNAL] [PATCH v2 1/2] test/dma: update the sg test to verify wrap around case Thread-Index: AQHakjkjULcbTiy+QEu4EHzl/2c8ubJ3dQqT Date: Fri, 4 Oct 2024 11:04:15 +0000 Message-ID: References: <20240416123747.4133884-1-vvelumuri@marvell.com> <20240419090734.43613-1-vvelumuri@marvell.com> In-Reply-To: <20240419090734.43613-1-vvelumuri@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: SJ0PR18MB5161:EE_|IA3PR18MB6312:EE_ x-ms-office365-filtering-correlation-id: f627c871-03fe-4019-cbf7-08dce46448f7 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable ________________________________ From: Vidya Sagar Velumuri Sent: Friday, April 19, 2024 2:37 PM To: fengchengwen@huawei.com ; kevin.laatz@intel.co= m ; bruce.richardson@intel.com Cc: Jerin Jacob ; Anoob Joseph ; Vi= dya Sagar Velumuri ; Aakash Sasidharan ; Tejasree Kondoj ; Gowrishankar Muthukr= ishnan ; dev@dpdk.org Subject: [EXTERNAL] [PATCH v2 1/2] test/dma: update the sg test to verify w= rap around case Prioritize security for external emails: Confirm sender and content safety = before clicking links or opening attachments ---------------------------------------------------------------------- Run the sg test in a loop to verify wrap around case. Total number commands submitted to be more than the number descriptors allocated to verify the scenario. Signed-off-by: Vidya Sagar Velumuri diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c index 143e1bcd68..7462e90831 100644 --- a/app/test/test_dmadev.c +++ b/app/test/test_dmadev.c @@ -393,34 +393,26 @@ test_stop_start(int16_t dev_id, uint16_t vchan) } static int -test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan) +test_enqueue_sg(int16_t dev_id, uint16_t vchan, unsigned int n_sge, unsign= ed int test_len) { - unsigned int src_len, dst_len, n_sge, len, i, j, k; char orig_src[COPY_LEN], orig_dst[COPY_LEN]; - struct rte_dma_info info =3D { 0 }; + unsigned int src_len, dst_len, i, j, k; enum rte_dma_status_code status; uint16_t id, n_src, n_dst; - if (rte_dma_info_get(dev_id, &info) < 0) - ERR_RETURN("Failed to get dev info"); - - if (info.max_sges < 2) - ERR_RETURN("Test needs minimum 2 SG pointers"); - - n_sge =3D info.max_sges; - for (n_src =3D 1; n_src <=3D n_sge; n_src++) { for (n_dst =3D 1; n_dst <=3D n_sge; n_dst++) { /* Normalize SG buffer lengths */ - len =3D COPY_LEN; - len -=3D (len % (n_src * n_dst)); - dst_len =3D len / n_dst; - src_len =3D len / n_src; - + unsigned int len =3D test_len - (test_len % (n_src = * n_dst)); struct rte_dma_sge sg_src[n_sge], sg_dst[n_sge]; struct rte_mbuf *src[n_sge], *dst[n_sge]; char *src_data[n_sge], *dst_data[n_sge]; + dst_len =3D len / n_dst; + src_len =3D len / n_src; + if (dst_len =3D=3D 0 || src_len =3D=3D 0) + continue; + for (i =3D 0 ; i < len; i++) orig_src[i] =3D rte_rand() & 0xFF; @@ -511,6 +503,27 @@ test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan) return 0; } +static int +test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan) +{ + struct rte_dma_info info =3D { 0 }; + unsigned int n_sge, len; + int loop_count =3D 0; + + if (rte_dma_info_get(dev_id, &info) < 0) + ERR_RETURN("Failed to get dev info"); + + n_sge =3D RTE_MIN(info.max_sges, TEST_SG_MAX); + len =3D COPY_LEN; + + do { + test_enqueue_sg(dev_id, vchan, n_sge, len); + loop_count++; + } while (loop_count * n_sge * n_sge < TEST_RINGSIZE * 3); + + return 0; +} + /* Failure handling test cases - global macros and variables for those tes= ts*/ #define COMP_BURST_SZ 16 #define OPT_FENCE(idx) ((fence && idx =3D=3D 8) ? RTE_DMA_OP_FLAG_FENCE : = 0) diff --git a/app/test/test_dmadev_api.c b/app/test/test_dmadev_api.c index d40c05cfbf..6a07ed593b 100644 --- a/app/test/test_dmadev_api.c +++ b/app/test/test_dmadev_api.c @@ -16,7 +16,6 @@ extern int test_dma_api(uint16_t dev_id); #define TEST_MEMCPY_SIZE 1024 #define TEST_WAIT_US_VAL 50000 -#define TEST_SG_MAX 64 static int16_t test_dev_id; static int16_t invalid_dev_id; diff --git a/app/test/test_dmadev_api.h b/app/test/test_dmadev_api.h index 33fbc5bd41..a03f7acd4f 100644 --- a/app/test/test_dmadev_api.h +++ b/app/test/test_dmadev_api.h @@ -2,4 +2,6 @@ * Copyright(c) 2021 HiSilicon Limited */ +#define TEST_SG_MAX 64 + int test_dma_api(uint16_t dev_id); -- 2.25.1 Acked-by: Amit Prakash Shukla Thanks --_000_SJ0PR18MB5161A187101E8A73A25636A3C8722SJ0PR18MB5161namp_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable


From: Vidya = Sagar Velumuri <vvelumuri@marvell.com>
Sent: Friday, April 19, 2024 2:37 PM
To: fengchengwen@huawei.com <fengchengwen@huawei.com>; ke= vin.laatz@intel.com <kevin.laatz@intel.com>; bruce.richardson@intel.c= om <bruce.richardson@intel.com>
Cc: Jerin Jacob <jerinj@marvell.com>; Anoob Joseph <an= oobj@marvell.com>; Vidya Sagar Velumuri <vvelumuri@marvell.com>; A= akash Sasidharan <asasidharan@marvell.com>; Tejasree Kondoj <kteja= sree@marvell.com>; Gowrishankar Muthukrishnan <gmuthukrishn@marvell.c= om>; dev@dpdk.org <dev@dpdk.org>
Subject: [EXTERNAL] [PATCH v2 1/2] test/dma: update the sg test= to verify wrap around case
 
Prioritize securit= y for external emails: Confirm sender and content safety before clicking li= nks or opening attachments

----------------------------------------------------------------------
Run the sg test in a loop to verify wrap around case.
Total number commands submitted to be more than the number descriptors
allocated to verify the scenario.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c
index 143e1bcd68..7462e90831 100644
--- a/app/test/test_dmadev.c
+++ b/app/test/test_dmadev.c
@@ -393,34 +393,26 @@ test_stop_start(int16_t dev_id, uint16_t vchan)
 }
 
 static int
-test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan)
+test_enqueue_sg(int16_t dev_id, uint16_t vchan, unsigned int n_sge, unsign= ed int test_len)
 {
-       unsigned int src_len, dst_len, n_sge,= len, i, j, k;
         char orig_src[COPY_LEN], o= rig_dst[COPY_LEN];
-       struct rte_dma_info info =3D { 0 }; +       unsigned int src_len, dst_len, i, j, = k;
         enum rte_dma_status_code s= tatus;
         uint16_t id, n_src, n_dst;=
 
-       if (rte_dma_info_get(dev_id, &inf= o) < 0)
-            &n= bsp;  ERR_RETURN("Failed to get dev info");
-
-       if (info.max_sges < 2)
-            &n= bsp;  ERR_RETURN("Test needs minimum 2 SG pointers");
-
-       n_sge =3D info.max_sges;
-
         for (n_src =3D 1; n_src &l= t;=3D n_sge; n_src++) {
            &nb= sp;    for (n_dst =3D 1; n_dst <=3D n_sge; n_dst++) {
            &nb= sp;            /* No= rmalize SG buffer lengths */
-            &n= bsp;          len =3D COPY_LEN= ;
-            &n= bsp;          len -=3D (len % = (n_src * n_dst));
-            &n= bsp;          dst_len =3D len = / n_dst;
-            &n= bsp;          src_len =3D len = / n_src;
-
+            &n= bsp;          unsigned int len= =3D test_len - (test_len % (n_src * n_dst));
            &nb= sp;            struc= t rte_dma_sge sg_src[n_sge], sg_dst[n_sge];
            &nb= sp;            struc= t rte_mbuf *src[n_sge], *dst[n_sge];
            &nb= sp;            char = *src_data[n_sge], *dst_data[n_sge];
 
+            &n= bsp;          dst_len =3D len = / n_dst;
+            &n= bsp;          src_len =3D len = / n_src;
+            &n= bsp;          if (dst_len =3D= =3D 0 || src_len =3D=3D 0)
+            &n= bsp;            = ;      continue;
+
            &nb= sp;            for (= i =3D 0 ; i < len; i++)
            &nb= sp;            =         orig_src[i] =3D rte_rand() &= 0xFF;
 
@@ -511,6 +503,27 @@ test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan)=
         return 0;
 }
 
+static int
+test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan)
+{
+       struct rte_dma_info info =3D { 0 }; +       unsigned int n_sge, len;
+       int loop_count =3D 0;
+
+       if (rte_dma_info_get(dev_id, &inf= o) < 0)
+            &n= bsp;  ERR_RETURN("Failed to get dev info");
+
+       n_sge =3D RTE_MIN(info.max_sges, TEST= _SG_MAX);
+       len =3D COPY_LEN;
+
+       do {
+            &n= bsp;  test_enqueue_sg(dev_id, vchan, n_sge, len);
+            &n= bsp;  loop_count++;
+       } while (loop_count * n_sge * n_sge &= lt; TEST_RINGSIZE * 3);
+
+       return 0;
+}
+
 /* Failure handling test cases - global macros and variables for thos= e tests*/
 #define COMP_BURST_SZ   16
 #define OPT_FENCE(idx) ((fence && idx =3D=3D 8) ? RTE_DMA_OP_= FLAG_FENCE : 0)
diff --git a/app/test/test_dmadev_api.c b/app/test/test_dmadev_api.c
index d40c05cfbf..6a07ed593b 100644
--- a/app/test/test_dmadev_api.c
+++ b/app/test/test_dmadev_api.c
@@ -16,7 +16,6 @@ extern int test_dma_api(uint16_t dev_id);
 
 #define TEST_MEMCPY_SIZE        10= 24
 #define TEST_WAIT_US_VAL        50= 000
-#define TEST_SG_MAX         &= nbsp;  64
 
 static int16_t test_dev_id;
 static int16_t invalid_dev_id;
diff --git a/app/test/test_dmadev_api.h b/app/test/test_dmadev_api.h
index 33fbc5bd41..a03f7acd4f 100644
--- a/app/test/test_dmadev_api.h
+++ b/app/test/test_dmadev_api.h
@@ -2,4 +2,6 @@
  * Copyright(c) 2021 HiSilicon Limited
  */
 
+#define TEST_SG_MAX         &= nbsp;  64
+
 int test_dma_api(uint16_t dev_id);
--
2.25.1

Acked-by: Amit Prakash Shukla <amitprakashs@marvell.com>

Thanks
--_000_SJ0PR18MB5161A187101E8A73A25636A3C8722SJ0PR18MB5161namp_--