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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN6PR11MB2621.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 39637818-17d8-4aa4-28ff-08d909249cc1 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Apr 2021 02:31:50.2053 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: P3zT5sQXaKgsMx8J24753UEunAd3UkM8ERlVlRmvUcyjgw92FLE9kLsEyTxnp3K8r5c+9It98O6TLAv8C37WKQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR11MB3421 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [DPDK] net/ice: fix txq mbuf release mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: dev On Behalf Of Alvin Zhang > Sent: Sunday, April 25, 2021 5:27 PM > To: Zhang, Qi Z ; Yang, Qiming > Cc: dev@dpdk.org; Zhang, AlvinX ; stable@dpdk.org > Subject: [dpdk-dev] [DPDK] net/ice: fix txq mbuf release mode >=20 > In some cases, it seems that the txq mbuf vector release mode is enabled = first, > and then it is confirmed that the conditions for using the vector mode ar= e not > met. >=20 > This patch puts the txq vector mode startup process after the condition > detection. >=20 > Fixes: 28f9002ab67f ("net/ice: add Tx AVX512 offload path") > Cc: stable@dpdk.org >=20 > Signed-off-by: Alvin Zhang > --- > drivers/net/ice/ice_rxtx.c | 16 +++++++++------- > 1 file changed, 9 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c inde= x > 92fbbc1..49abcb2 100644 > --- a/drivers/net/ice/ice_rxtx.c > +++ b/drivers/net/ice/ice_rxtx.c > @@ -3303,13 +3303,6 @@ > if (tx_check_ret >=3D 0 && > rte_vect_get_max_simd_bitwidth() >=3D RTE_VECT_SIMD_128) > { > ad->tx_vec_allowed =3D true; > - for (i =3D 0; i < dev->data->nb_tx_queues; i++) { > - txq =3D dev->data->tx_queues[i]; > - if (txq && ice_txq_vec_setup(txq)) { > - ad->tx_vec_allowed =3D false; > - break; > - } > - } >=20 > if (rte_vect_get_max_simd_bitwidth() >=3D > RTE_VECT_SIMD_512 && > rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) =3D=3D > 1 && @@ -3329,6 +3322,15 @@ > if (!use_avx512 && tx_check_ret =3D=3D > ICE_VECTOR_OFFLOAD_PATH) > ad->tx_vec_allowed =3D false; >=20 > + if (ad->tx_vec_allowed) { > + for (i =3D 0; i < dev->data->nb_tx_queues; i++) { > + txq =3D dev->data->tx_queues[i]; > + if (txq && ice_txq_vec_setup(txq)) { > + ad->tx_vec_allowed =3D false; > + break; > + } > + } > + } > } else { > ad->tx_vec_allowed =3D false; > } > -- > 1.8.3.1 Acked-by: Leyi Rong