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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN6PR11MB3103.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a094cd5f-98d3-4c83-a8d9-08d94231663b X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Jul 2021 16:56:58.3463 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: xTDcispPcy0J6JxpqTfttoLAzU+oR0lNxYgRMF9KZl65WsvzbRTN3iZ3Aah/ihUWlvXO906F4q1pS5yUy0h81VinJMS8FEbIPqrXyVJjLeQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR11MB3294 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v8 1/7] power_intrinsics: use callbacks for comparison X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Burakov, Anatoly > Sent: Thursday, July 8, 2021 9:14 AM > To: dev@dpdk.org; McDaniel, Timothy ; Xing, > Beilei ; Wu, Jingjing ; Yan= g, > Qiming ; Zhang, Qi Z ; Wang, > Haiyue ; Matan Azrad ; Shahaf > Shuler ; Viacheslav Ovsiienko ; > Richardson, Bruce ; Ananyev, Konstantin > > Cc: Loftus, Ciara ; Hunt, David > Subject: [PATCH v8 1/7] power_intrinsics: use callbacks for comparison >=20 > Previously, the semantics of power monitor were such that we were > checking current value against the expected value, and if they matched, > then the sleep was aborted. This is somewhat inflexible, because it only > allowed us to check for a specific value in a specific way. >=20 > This commit replaces the comparison with a user callback mechanism, so > that any PMD (or other code) using `rte_power_monitor()` can define > their own comparison semantics and decision making on how to detect the > need to abort the entering of power optimized state. >=20 > Existing implementations are adjusted to follow the new semantics. >=20 > Suggested-by: Konstantin Ananyev > Signed-off-by: Anatoly Burakov > Acked-by: Konstantin Ananyev > --- >=20 > Notes: > v4: > - Return error if callback is set to NULL > - Replace raw number with a macro in monitor condition opaque data >=20 > v2: > - Use callback mechanism for more flexibility > - Address feedback from Konstantin >=20 > doc/guides/rel_notes/release_21_08.rst | 2 ++ > drivers/event/dlb2/dlb2.c | 17 ++++++++-- > drivers/net/i40e/i40e_rxtx.c | 20 +++++++---- > drivers/net/iavf/iavf_rxtx.c | 20 +++++++---- > drivers/net/ice/ice_rxtx.c | 20 +++++++---- > drivers/net/ixgbe/ixgbe_rxtx.c | 20 +++++++---- > drivers/net/mlx5/mlx5_rx.c | 17 ++++++++-- > .../include/generic/rte_power_intrinsics.h | 33 +++++++++++++++---- > lib/eal/x86/rte_power_intrinsics.c | 17 +++++----- > 9 files changed, 122 insertions(+), 44 deletions(-) >=20 > diff --git a/doc/guides/rel_notes/release_21_08.rst > b/doc/guides/rel_notes/release_21_08.rst > index c92e016783..65910de348 100644 > --- a/doc/guides/rel_notes/release_21_08.rst > +++ b/doc/guides/rel_notes/release_21_08.rst > @@ -135,6 +135,8 @@ API Changes > * eal: ``rte_strscpy`` sets ``rte_errno`` to ``E2BIG`` in case of string > truncation. >=20 > +* eal: the ``rte_power_intrinsics`` API changed to use a callback mechan= ism. > + >=20 > ABI Changes > ----------- > diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c > index eca183753f..252bbd8d5e 100644 > --- a/drivers/event/dlb2/dlb2.c > +++ b/drivers/event/dlb2/dlb2.c > @@ -3154,6 +3154,16 @@ dlb2_port_credits_inc(struct dlb2_port *qm_port, > int num) > } > } >=20 > +#define CLB_MASK_IDX 0 > +#define CLB_VAL_IDX 1 > +static int > +dlb2_monitor_callback(const uint64_t val, > + const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]) > +{ > + /* abort if the value matches */ > + return (val & opaque[CLB_MASK_IDX]) =3D=3D opaque[CLB_VAL_IDX] ? -1 : > 0; > +} > + > static inline int > dlb2_dequeue_wait(struct dlb2_eventdev *dlb2, > struct dlb2_eventdev_port *ev_port, > @@ -3194,8 +3204,11 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2, > expected_value =3D 0; >=20 > pmc.addr =3D monitor_addr; > - pmc.val =3D expected_value; > - pmc.mask =3D qe_mask.raw_qe[1]; > + /* store expected value and comparison mask in opaque data */ > + pmc.opaque[CLB_VAL_IDX] =3D expected_value; > + pmc.opaque[CLB_MASK_IDX] =3D qe_mask.raw_qe[1]; > + /* set up callback */ > + pmc.fn =3D dlb2_monitor_callback; > pmc.size =3D sizeof(uint64_t); >=20 > rte_power_monitor(&pmc, timeout + start_ticks); > diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c > index 8d65f287f4..65f325ede1 100644 > --- a/drivers/net/i40e/i40e_rxtx.c > +++ b/drivers/net/i40e/i40e_rxtx.c > @@ -81,6 +81,18 @@ > #define I40E_TX_OFFLOAD_SIMPLE_NOTSUP_MASK \ > (PKT_TX_OFFLOAD_MASK ^ > I40E_TX_OFFLOAD_SIMPLE_SUP_MASK) >=20 > +static int > +i40e_monitor_callback(const uint64_t value, > + const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] > __rte_unused) > +{ > + const uint64_t m =3D rte_cpu_to_le_64(1 << > I40E_RX_DESC_STATUS_DD_SHIFT); > + /* > + * we expect the DD bit to be set to 1 if this descriptor was already > + * written to. > + */ > + return (value & m) =3D=3D m ? -1 : 0; > +} > + > int > i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond > *pmc) > { > @@ -93,12 +105,8 @@ i40e_get_monitor_addr(void *rx_queue, struct > rte_power_monitor_cond *pmc) > /* watch for changes in status bit */ > pmc->addr =3D &rxdp->wb.qword1.status_error_len; >=20 > - /* > - * we expect the DD bit to be set to 1 if this descriptor was already > - * written to. > - */ > - pmc->val =3D rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT); > - pmc->mask =3D rte_cpu_to_le_64(1 << > I40E_RX_DESC_STATUS_DD_SHIFT); > + /* comparison callback */ > + pmc->fn =3D i40e_monitor_callback; >=20 > /* registers are 64-bit */ > pmc->size =3D sizeof(uint64_t); > diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c > index f817fbc49b..d61b32fcee 100644 > --- a/drivers/net/iavf/iavf_rxtx.c > +++ b/drivers/net/iavf/iavf_rxtx.c > @@ -57,6 +57,18 @@ iavf_proto_xtr_type_to_rxdid(uint8_t flex_type) > rxdid_map[flex_type] : > IAVF_RXDID_COMMS_OVS_1; > } >=20 > +static int > +iavf_monitor_callback(const uint64_t value, > + const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] > __rte_unused) > +{ > + const uint64_t m =3D rte_cpu_to_le_64(1 << > IAVF_RX_DESC_STATUS_DD_SHIFT); > + /* > + * we expect the DD bit to be set to 1 if this descriptor was already > + * written to. > + */ > + return (value & m) =3D=3D m ? -1 : 0; > +} > + > int > iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc= ) > { > @@ -69,12 +81,8 @@ iavf_get_monitor_addr(void *rx_queue, struct > rte_power_monitor_cond *pmc) > /* watch for changes in status bit */ > pmc->addr =3D &rxdp->wb.qword1.status_error_len; >=20 > - /* > - * we expect the DD bit to be set to 1 if this descriptor was already > - * written to. > - */ > - pmc->val =3D rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT); > - pmc->mask =3D rte_cpu_to_le_64(1 << > IAVF_RX_DESC_STATUS_DD_SHIFT); > + /* comparison callback */ > + pmc->fn =3D iavf_monitor_callback; >=20 > /* registers are 64-bit */ > pmc->size =3D sizeof(uint64_t); > diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c > index 3f6e735984..5d7ab4f047 100644 > --- a/drivers/net/ice/ice_rxtx.c > +++ b/drivers/net/ice/ice_rxtx.c > @@ -27,6 +27,18 @@ uint64_t > rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask; > uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask; > uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask; >=20 > +static int > +ice_monitor_callback(const uint64_t value, > + const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] > __rte_unused) > +{ > + const uint64_t m =3D rte_cpu_to_le_16(1 << > ICE_RX_FLEX_DESC_STATUS0_DD_S); > + /* > + * we expect the DD bit to be set to 1 if this descriptor was already > + * written to. > + */ > + return (value & m) =3D=3D m ? -1 : 0; > +} > + > int > ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc) > { > @@ -39,12 +51,8 @@ ice_get_monitor_addr(void *rx_queue, struct > rte_power_monitor_cond *pmc) > /* watch for changes in status bit */ > pmc->addr =3D &rxdp->wb.status_error0; >=20 > - /* > - * we expect the DD bit to be set to 1 if this descriptor was already > - * written to. > - */ > - pmc->val =3D rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S); > - pmc->mask =3D rte_cpu_to_le_16(1 << > ICE_RX_FLEX_DESC_STATUS0_DD_S); > + /* comparison callback */ > + pmc->fn =3D ice_monitor_callback; >=20 > /* register is 16-bit */ > pmc->size =3D sizeof(uint16_t); > diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxt= x.c > index d69f36e977..c814a28cb4 100644 > --- a/drivers/net/ixgbe/ixgbe_rxtx.c > +++ b/drivers/net/ixgbe/ixgbe_rxtx.c > @@ -1369,6 +1369,18 @@ const uint32_t > RTE_PTYPE_INNER_L3_IPV4_EXT | > RTE_PTYPE_INNER_L4_UDP, > }; >=20 > +static int > +ixgbe_monitor_callback(const uint64_t value, > + const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] > __rte_unused) > +{ > + const uint64_t m =3D rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD); > + /* > + * we expect the DD bit to be set to 1 if this descriptor was already > + * written to. > + */ > + return (value & m) =3D=3D m ? -1 : 0; > +} > + > int > ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond > *pmc) > { > @@ -1381,12 +1393,8 @@ ixgbe_get_monitor_addr(void *rx_queue, struct > rte_power_monitor_cond *pmc) > /* watch for changes in status bit */ > pmc->addr =3D &rxdp->wb.upper.status_error; >=20 > - /* > - * we expect the DD bit to be set to 1 if this descriptor was already > - * written to. > - */ > - pmc->val =3D rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD); > - pmc->mask =3D rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD); > + /* comparison callback */ > + pmc->fn =3D ixgbe_monitor_callback; >=20 > /* the registers are 32-bit */ > pmc->size =3D sizeof(uint32_t); > diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c > index 777a1d6e45..17370b77dc 100644 > --- a/drivers/net/mlx5/mlx5_rx.c > +++ b/drivers/net/mlx5/mlx5_rx.c > @@ -269,6 +269,18 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, > uint16_t rx_queue_id) > return rx_queue_count(rxq); > } >=20 > +#define CLB_VAL_IDX 0 > +#define CLB_MSK_IDX 1 > +static int > +mlx_monitor_callback(const uint64_t value, > + const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]) > +{ > + const uint64_t m =3D opaque[CLB_MSK_IDX]; > + const uint64_t v =3D opaque[CLB_VAL_IDX]; > + > + return (value & m) =3D=3D v ? -1 : 0; > +} > + > int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond > *pmc) > { > struct mlx5_rxq_data *rxq =3D rx_queue; > @@ -282,8 +294,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct > rte_power_monitor_cond *pmc) > return -rte_errno; > } > pmc->addr =3D &cqe->op_own; > - pmc->val =3D !!idx; > - pmc->mask =3D MLX5_CQE_OWNER_MASK; > + pmc->opaque[CLB_VAL_IDX] =3D !!idx; > + pmc->opaque[CLB_MSK_IDX] =3D MLX5_CQE_OWNER_MASK; > + pmc->fn =3D mlx_monitor_callback; > pmc->size =3D sizeof(uint8_t); > return 0; > } > diff --git a/lib/eal/include/generic/rte_power_intrinsics.h > b/lib/eal/include/generic/rte_power_intrinsics.h > index dddca3d41c..c9aa52a86d 100644 > --- a/lib/eal/include/generic/rte_power_intrinsics.h > +++ b/lib/eal/include/generic/rte_power_intrinsics.h > @@ -18,19 +18,38 @@ > * which are architecture-dependent. > */ >=20 > +/** Size of the opaque data in monitor condition */ > +#define RTE_POWER_MONITOR_OPAQUE_SZ 4 > + > +/** > + * Callback definition for monitoring conditions. Callbacks with this si= gnature > + * will be used by `rte_power_monitor()` to check if the entering of pow= er > + * optimized state should be aborted. > + * > + * @param val > + * The value read from memory. > + * @param opaque > + * Callback-specific data. > + * > + * @return > + * 0 if entering of power optimized state should proceed > + * -1 if entering of power optimized state should be aborted > + */ > +typedef int (*rte_power_monitor_clb_t)(const uint64_t val, > + const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]); > struct rte_power_monitor_cond { > volatile void *addr; /**< Address to monitor for changes */ > - uint64_t val; /**< If the `mask` is non-zero, location pointed > - * to by `addr` will be read and compared > - * against this value. > - */ > - uint64_t mask; /**< 64-bit mask to extract value read from `addr` */ > - uint8_t size; /**< Data size (in bytes) that will be used to compare > - * expected value (`val`) with data read from the > + uint8_t size; /**< Data size (in bytes) that will be read from the > * monitored memory location (`addr`). Can be 1, 2, > * 4, or 8. Supplying any other value will result in > * an error. > */ > + rte_power_monitor_clb_t fn; /**< Callback to be used to check if > + * entering power optimized state should > + * be aborted. > + */ > + uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]; > + /**< Callback-specific data */ > }; >=20 > /** > diff --git a/lib/eal/x86/rte_power_intrinsics.c > b/lib/eal/x86/rte_power_intrinsics.c > index 39ea9fdecd..66fea28897 100644 > --- a/lib/eal/x86/rte_power_intrinsics.c > +++ b/lib/eal/x86/rte_power_intrinsics.c > @@ -76,6 +76,7 @@ rte_power_monitor(const struct > rte_power_monitor_cond *pmc, > const uint32_t tsc_h =3D (uint32_t)(tsc_timestamp >> 32); > const unsigned int lcore_id =3D rte_lcore_id(); > struct power_wait_status *s; > + uint64_t cur_value; >=20 > /* prevent user from running this instruction if it's not supported */ > if (!wait_supported) > @@ -91,6 +92,9 @@ rte_power_monitor(const struct > rte_power_monitor_cond *pmc, > if (__check_val_size(pmc->size) < 0) > return -EINVAL; >=20 > + if (pmc->fn =3D=3D NULL) > + return -EINVAL; > + > s =3D &wait_status[lcore_id]; >=20 > /* update sleep address */ > @@ -110,16 +114,11 @@ rte_power_monitor(const struct > rte_power_monitor_cond *pmc, > /* now that we've put this address into monitor, we can unlock */ > rte_spinlock_unlock(&s->lock); >=20 > - /* if we have a comparison mask, we might not need to sleep at all */ > - if (pmc->mask) { > - const uint64_t cur_value =3D __get_umwait_val( > - pmc->addr, pmc->size); > - const uint64_t masked =3D cur_value & pmc->mask; > + cur_value =3D __get_umwait_val(pmc->addr, pmc->size); >=20 > - /* if the masked value is already matching, abort */ > - if (masked =3D=3D pmc->val) > - goto end; > - } > + /* check if callback indicates we should abort */ > + if (pmc->fn(cur_value, pmc->opaque) !=3D 0) > + goto end; >=20 > /* execute UMWAIT */ > asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;" > -- > 2.25.1 DLB changes look good to me Acked-by: timothy.mcdaniel@intel.com