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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN6PR11MB3504.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ab367fc6-0518-4bae-2c9d-08db213e717a X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Mar 2023 08:07:07.8422 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: UN+ciDs6s4c2JPmDk48h4G7VcJxle0j5mpL0IhSrr0YvathzhihLItXnniqKNbqNhn/04oRTAvlSqbYsNCIM3w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR11MB4753 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: David Marchand > Sent: Thursday, March 9, 2023 10:36 PM > To: dev@dpdk.org > Cc: Pei, Andy ; Maxime Coquelin > ; Xia, Chenbo > Subject: [PATCH] net/virtio: remove address width limit for modern device= s >=20 > Modern devices don't have the same limitation as legacy devices, because > vring addresses are not configured using a 32-bit register. >=20 > Signed-off-by: David Marchand > --- > drivers/net/virtio/virtio_pci.c | 28 ++++++++-------------------- > 1 file changed, 8 insertions(+), 20 deletions(-) >=20 > diff --git a/drivers/net/virtio/virtio_pci.c > b/drivers/net/virtio/virtio_pci.c > index 9cf4d760b4..29eb739b04 100644 > --- a/drivers/net/virtio/virtio_pci.c > +++ b/drivers/net/virtio/virtio_pci.c > @@ -33,22 +33,6 @@ >=20 > struct virtio_pci_internal virtio_pci_internal[RTE_MAX_ETHPORTS]; >=20 > -static inline int > -check_vq_phys_addr_ok(struct virtqueue *vq) > -{ > - /* Virtio PCI device VIRTIO_PCI_QUEUE_PF register is 32bit, > - * and only accepts 32 bit page frame number. > - * Check if the allocated physical memory exceeds 16TB. > - */ > - if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >> > - (VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) { > - PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!"); > - return 0; > - } > - > - return 1; > -} > - > #define PCI_MSIX_ENABLE 0x8000 >=20 > static enum virtio_msix_status > @@ -273,8 +257,15 @@ legacy_setup_queue(struct virtio_hw *hw, struct > virtqueue *vq) > { > uint32_t src; >=20 > - if (!check_vq_phys_addr_ok(vq)) > + /* Virtio PCI device VIRTIO_PCI_QUEUE_PFN register is 32bit, > + * and only accepts 32 bit page frame number. > + * Check if the allocated physical memory exceeds 16TB. > + */ > + if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >> > + (VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) { > + PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!"); > return -1; > + } >=20 > rte_pci_ioport_write(VTPCI_IO(hw), &vq->vq_queue_index, 2, > VIRTIO_PCI_QUEUE_SEL); > @@ -476,9 +467,6 @@ modern_setup_queue(struct virtio_hw *hw, struct > virtqueue *vq) > uint64_t desc_addr, avail_addr, used_addr; > uint16_t notify_off; >=20 > - if (!check_vq_phys_addr_ok(vq)) > - return -1; > - > desc_addr =3D vq->vq_ring_mem; > avail_addr =3D desc_addr + vq->vq_nentries * sizeof(struct vring_desc); > used_addr =3D RTE_ALIGN_CEIL(avail_addr + offsetof(struct vring_avail, > -- > 2.39.2 Agree that we should backport it. Reviewed-by: Chenbo Xia =20