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From: "Xia, Chenbo" <chenbo.xia@intel.com>
To: "Ding, Xuan" <xuan.ding@intel.com>,
	"maxime.coquelin@redhat.com" <maxime.coquelin@redhat.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, "Hu, Jiayu" <jiayu.hu@intel.com>,
	"He, Xingguang" <xingguang.he@intel.com>,
	"Yang, YvonneX" <yvonnex.yang@intel.com>,
	"Jiang, Cheng1" <cheng1.jiang@intel.com>,
	"Wang, YuanX" <yuanx.wang@intel.com>,
	"Ma, WenwuX" <wenwux.ma@intel.com>
Subject: RE: [PATCH v3 2/2] examples/vhost: unconfigure DMA vchannel
Date: Thu, 29 Sep 2022 08:27:48 +0000	[thread overview]
Message-ID: <SN6PR11MB35046772918FC1689E2C84BB9C579@SN6PR11MB3504.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20220929013243.15889-3-xuan.ding@intel.com>

> -----Original Message-----
> From: Ding, Xuan <xuan.ding@intel.com>
> Sent: Thursday, September 29, 2022 9:33 AM
> To: maxime.coquelin@redhat.com; Xia, Chenbo <chenbo.xia@intel.com>
> Cc: dev@dpdk.org; Hu, Jiayu <jiayu.hu@intel.com>; He, Xingguang
> <xingguang.he@intel.com>; Yang, YvonneX <yvonnex.yang@intel.com>; Jiang,
> Cheng1 <cheng1.jiang@intel.com>; Wang, YuanX <yuanx.wang@intel.com>; Ma,
> WenwuX <wenwux.ma@intel.com>; Ding, Xuan <xuan.ding@intel.com>
> Subject: [PATCH v3 2/2] examples/vhost: unconfigure DMA vchannel
> 
> From: Xuan Ding <xuan.ding@intel.com>
> 
> This patch applies rte_vhost_async_dma_unconfigure() API
> to manually free DMA vchannels instead of waiting
> until the program ends to be released.
> 
> Signed-off-by: Xuan Ding <xuan.ding@intel.com>
> ---
>  examples/vhost/main.c | 45 ++++++++++++++++++++++++++++++-------------
>  examples/vhost/main.h |  1 +
>  2 files changed, 33 insertions(+), 13 deletions(-)
> 
> diff --git a/examples/vhost/main.c b/examples/vhost/main.c
> index 0fa4753e70..32f396d88a 100644
> --- a/examples/vhost/main.c
> +++ b/examples/vhost/main.c
> @@ -1558,6 +1558,28 @@ vhost_clear_queue(struct vhost_dev *vdev, uint16_t
> queue_id)
>  	}
>  }
> 
> +static void
> +vhost_clear_async(struct vhost_dev *vdev, int vid, uint16_t queue_id)
> +{
> +	int16_t dma_id;
> +	uint16_t ref_count;
> +
> +	if (dma_bind[vid].dmas[queue_id].async_enabled) {
> +		vhost_clear_queue(vdev, queue_id);
> +		rte_vhost_async_channel_unregister(vid, queue_id);
> +		dma_bind[vid].dmas[queue_id].async_enabled = false;
> +	}
> +
> +	dma_id = dma_bind[vid2socketid[vdev->vid]].dmas[queue_id].dev_id;
> +	dma_bind[vid2socketid[vdev->vid]].dmas[queue_id].dma_ref_count--;
> +	ref_count = dma_bind[vid2socketid[vdev-
> >vid]].dmas[queue_id].dma_ref_count;

Above two lines could be combined like 'ref_count = --XXXX'

But I wonder is this dma_ref_count really needed? It's always 0/1 like
Async_enabled, no? If it target at multi-port sharing same one dma case,
it should not be implemented like this.

Thanks,
Chenbo

> +
> +	if (ref_count == 0 && dma_id != INVALID_DMA_ID) {
> +		if (rte_vhost_async_dma_unconfigure(dma_id, 0) < 0)
> +			RTE_LOG(ERR, VHOST_PORT, "Failed to unconfigure DMA in
> vhost.\n");
> +	}
> +}
> +
>  /*
>   * Remove a device from the specific data core linked list and from the
>   * main linked list. Synchronization  occurs through the use of the
> @@ -1614,17 +1636,8 @@ destroy_device(int vid)
>  		"(%d) device has been removed from data core\n",
>  		vdev->vid);
> 
> -	if (dma_bind[vid].dmas[VIRTIO_RXQ].async_enabled) {
> -		vhost_clear_queue(vdev, VIRTIO_RXQ);
> -		rte_vhost_async_channel_unregister(vid, VIRTIO_RXQ);
> -		dma_bind[vid].dmas[VIRTIO_RXQ].async_enabled = false;
> -	}
> -
> -	if (dma_bind[vid].dmas[VIRTIO_TXQ].async_enabled) {
> -		vhost_clear_queue(vdev, VIRTIO_TXQ);
> -		rte_vhost_async_channel_unregister(vid, VIRTIO_TXQ);
> -		dma_bind[vid].dmas[VIRTIO_TXQ].async_enabled = false;
> -	}
> +	vhost_clear_async(vdev, vid, VIRTIO_RXQ);
> +	vhost_clear_async(vdev, vid, VIRTIO_TXQ);
> 
>  	rte_free(vdev);
>  }
> @@ -1673,14 +1686,19 @@ vhost_async_channel_register(int vid)
> 
>  	if (dma_bind[vid2socketid[vid]].dmas[VIRTIO_RXQ].dev_id !=
> INVALID_DMA_ID) {
>  		rx_ret = rte_vhost_async_channel_register(vid, VIRTIO_RXQ);
> -		if (rx_ret == 0)
> +		if (rx_ret == 0) {
> 
> 	dma_bind[vid2socketid[vid]].dmas[VIRTIO_RXQ].async_enabled = true;
> +
> 	dma_bind[vid2socketid[vid]].dmas[VIRTIO_RXQ].dma_ref_count++;
> +		}
> +
>  	}
> 
>  	if (dma_bind[vid2socketid[vid]].dmas[VIRTIO_TXQ].dev_id !=
> INVALID_DMA_ID) {
>  		tx_ret = rte_vhost_async_channel_register(vid, VIRTIO_TXQ);
> -		if (tx_ret == 0)
> +		if (tx_ret == 0) {
> 
> 	dma_bind[vid2socketid[vid]].dmas[VIRTIO_TXQ].async_enabled = true;
> +
> 	dma_bind[vid2socketid[vid]].dmas[VIRTIO_TXQ].dma_ref_count++;
> +		}
>  	}
> 
>  	return rx_ret | tx_ret;
> @@ -1886,6 +1904,7 @@ reset_dma(void)
>  		for (j = 0; j < RTE_MAX_QUEUES_PER_PORT * 2; j++) {
>  			dma_bind[i].dmas[j].dev_id = INVALID_DMA_ID;
>  			dma_bind[i].dmas[j].async_enabled = false;
> +			dma_bind[i].dmas[j].dma_ref_count = 0;
>  		}
>  	}
> 
> diff --git a/examples/vhost/main.h b/examples/vhost/main.h
> index 2fcb8376c5..2b2cf828d3 100644
> --- a/examples/vhost/main.h
> +++ b/examples/vhost/main.h
> @@ -96,6 +96,7 @@ struct dma_info {
>  	struct rte_pci_addr addr;
>  	int16_t dev_id;
>  	bool async_enabled;
> +	uint16_t dma_ref_count;
>  };
> 
>  struct dma_for_vhost {
> --
> 2.17.1


  reply	other threads:[~2022-09-29  8:27 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-14 14:04 [PATCH v1 0/2] vhost: introduce DMA vchannel unconfiguration xuan.ding
2022-08-14 14:04 ` [PATCH v1 1/2] " xuan.ding
2022-08-14 14:04 ` [PATCH v1 2/2] example/vhost: unconfigure DMA vchannel xuan.ding
2022-09-06  5:21 ` [PATCH v2 0/2] vhost: introduce DMA vchannel unconfiguration xuan.ding
2022-09-06  5:21   ` [PATCH v2 1/2] " xuan.ding
2022-09-26  6:06     ` Xia, Chenbo
2022-09-26  6:43       ` Ding, Xuan
2022-09-06  5:21   ` [PATCH v2 2/2] examples/vhost: unconfigure DMA vchannel xuan.ding
2022-09-29  1:32 ` [PATCH v3 0/2] vhost: introduce DMA vchannel unconfiguration xuan.ding
2022-09-29  1:32   ` [PATCH v3 1/2] " xuan.ding
2022-09-29  1:32   ` [PATCH v3 2/2] examples/vhost: unconfigure DMA vchannel xuan.ding
2022-09-29  8:27     ` Xia, Chenbo [this message]
2022-10-08  0:38       ` Ding, Xuan
2022-10-13  6:40 ` [PATCH v4 0/2] vhost: introduce DMA vchannel unconfiguration xuan.ding
2022-10-13  6:40   ` [PATCH v4 1/2] " xuan.ding
2022-10-13  8:01     ` Maxime Coquelin
2022-10-13  8:45       ` Ding, Xuan
2022-10-13  6:40   ` [PATCH v4 2/2] examples/vhost: unconfigure DMA vchannel xuan.ding
2022-10-13  8:07     ` Maxime Coquelin
2022-10-13  8:49       ` Ding, Xuan
2022-10-13  9:27 ` [PATCH v5 0/2] vhost: introduce DMA vchannel unconfiguration xuan.ding
2022-10-13  9:27   ` [PATCH v5 1/2] " xuan.ding
2022-10-13  9:27   ` [PATCH v5 2/2] examples/vhost: unconfigure DMA vchannel xuan.ding
2022-10-18 15:22 ` [PATCH v6 0/2] vhost: introduce DMA vchannel unconfiguration xuan.ding
2022-10-18 15:22   ` [PATCH v6 1/2] " xuan.ding
2022-10-19  9:28     ` Xia, Chenbo
2022-10-18 15:22   ` [PATCH v6 2/2] examples/vhost: unconfigure DMA vchannel xuan.ding
2022-10-19  2:57     ` Ling, WeiX
2022-10-20  9:11 ` [PATCH v7 0/2] vhost: introduce DMA vchannel unconfiguration xuan.ding
2022-10-20  9:11   ` [PATCH v7 1/2] " xuan.ding
2022-10-21  8:09     ` Maxime Coquelin
2022-10-21  8:22       ` Ding, Xuan
2022-10-20  9:11   ` [PATCH v7 2/2] examples/vhost: unconfigure DMA vchannel xuan.ding
2022-10-21  8:12     ` Maxime Coquelin
2022-10-25  8:25 ` [PATCH v8 0/2] vhost: introduce DMA vchannel unconfiguration xuan.ding
2022-10-25  8:25   ` [PATCH v8 1/2] " xuan.ding
2022-10-26  5:13     ` Maxime Coquelin
2022-10-26  9:02     ` Xia, Chenbo
2022-10-25  8:25   ` [PATCH v8 2/2] examples/vhost: unconfigure DMA vchannel xuan.ding
2022-10-25  9:56     ` Ling, WeiX
2022-10-26  5:14     ` Maxime Coquelin
2022-10-26  9:03     ` Xia, Chenbo
2022-10-26  9:07   ` [PATCH v8 0/2] vhost: introduce DMA vchannel unconfiguration Xia, Chenbo

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