From: Serhii Iliushyk <sil-plv@napatech.com>
To: David Marchand <david.marchand@redhat.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
Mykola Kostenok <mko-plv@napatech.com>,
Christian Koue Muf <ckm@napatech.com>,
"stephen@networkplumber.org" <stephen@networkplumber.org>,
Thomas Monjalon <thomas@monjalon.net>,
Uffe Jakobsen <uj@napatech.com>
Subject: Re: [PATCH v1 20/32] net/ntnic: add clock init
Date: Fri, 7 Mar 2025 10:20:04 +0000 [thread overview]
Message-ID: <VE1P190MB08301A245E9958C21C63D0FA80D52@VE1P190MB0830.EURP190.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <CAJFAV8xtMHZfXo3c8vw0LG9-Cg4v8LCKjP8+psm=sJ3XoFzyNw@mail.gmail.com>
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On 05.03.2025, 19:03, "David Marchand" <david.marchand@redhat.com> wrote:
On Thu, Feb 20, 2025 at 11:06 PM Serhii Iliushyk <sil-plv@napatech.com> wrote:
> diff --git a/drivers/net/ntnic/nthw/core/include/NT400D13_U62_Si5332-GM2-RevD-1_V5-Registers.h b/drivers/net/ntnic/nthw/core/include/NT400D13_U62_Si5332-GM2-RevD-1_V5-Registers.h
> new file mode 100644
> index 0000000000..f87828fcfe
> --- /dev/null
> +++ b/drivers/net/ntnic/nthw/core/include/NT400D13_U62_Si5332-GM2-RevD-1_V5-Registers.h
> @@ -0,0 +1,425 @@
> +/*
> + * Si5332-GM2 Rev D Configuration Register Export Header File
> + *
> + * This file represents a series of Skyworks Si5332-GM2 Rev D
> + * register writes that can be performed to load a single configuration
> + * on a device. It was created by a Skyworks ClockBuilder Pro
> + * export tool.
> + *
This file is missing a SPDX tag.
Please send a fix or we will have to revert this change.
The filename also looks strange, as it does not follow some kind of
implicit convention (when I compare to other files in this driver).
Could it be renamed?
--
David Marchand
Hi David,
We will add the SDPX to the current file. Thanks for noticing it.
The clock profiles are named according to our internal documentation on the PCB (board) design - the "Uxx" is actually the component number on the board design - the versioning ensures that we can support multiple versions of the clock profile for different PCB revisions.
Is it suitable for you to change the name of the file to all lowercase and remove dashes:
NT400D13_U62_Si5332-GM2-RevD-1_V5-Registers.h ---> nt400d13_u62_si5332_gm2_revd_1_v5_registers.h
BR,
Serhii
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next prev parent reply other threads:[~2025-03-07 10:20 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-20 22:03 [PATCH v1 00/32] add new adapter NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 01/32] net/ntnic: add link agx 100g Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 02/32] net/ntnic: add link state machine Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 03/32] net/ntnic: add rpf and gfg init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 04/32] net/ntnic: add agx setup for port Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 05/32] net/ntnic: add host loopback init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 06/32] net/ntnic: add line " Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 07/32] net/ntnic: add 100 gbps port init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 08/32] net/ntnic: add port post init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 09/32] net/ntnic: add nim low power API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 10/32] net/ntnic: add link handling API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 11/32] net/ntnic: add port init to the state machine Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 12/32] net/ntnic: add port disable API Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 13/32] net/ntnic: add minimal initialization new NIC NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 14/32] net/ntnic: add minimal reset FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 15/32] net/ntnic: add FPGA modules and registers Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 16/32] net/ntnic: add setup for fpga reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 17/32] net/ntnic: add default reset setting for NT400D13 Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 18/32] net/ntnic: add DDR calibration to reset stage Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 19/32] net/ntnic: add PHY ftile reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 20/32] net/ntnic: add clock init Serhii Iliushyk
2025-03-05 17:03 ` David Marchand
2025-03-07 10:20 ` Serhii Iliushyk [this message]
2025-02-20 22:03 ` [PATCH v1 21/32] net/ntnic: add nt400d13 pcm init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 22/32] net/ntnic: add HIF clock test Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 23/32] net/ntnic: add nt400d13 PRM module init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 24/32] net/ntnic: add nt400d13 PRM module reset Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 25/32] net/ntnic: add SPI v3 support for FPGA Serhii Iliushyk
2025-02-22 19:21 ` Stephen Hemminger
2025-02-20 22:03 ` [PATCH v1 26/32] net/ntnic: add i2cm init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 27/32] net/ntnic: add pca init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 28/32] net/ntnic: add pcal init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 29/32] net/ntnic: add reset PHY init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 30/32] net/ntnic: add igam module init Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 31/32] net/ntnic: init IGAM and config PLL for FPGA Serhii Iliushyk
2025-02-20 22:03 ` [PATCH v1 32/32] net/ntnic: revert untrusted loop bound Serhii Iliushyk
2025-02-20 22:31 ` Stephen Hemminger
2025-02-20 23:49 ` [PATCH v1 00/32] add new adapter NT400D13 Stephen Hemminger
2025-02-22 21:41 ` Stephen Hemminger
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