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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB4688 Original-Authentication-Results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=arm.com; X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DB5EUR03FT031.eop-EUR03.prod.protection.outlook.com X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFTY:; SFS:(4636009)(39860400002)(376002)(346002)(396003)(136003)(46966005)(33656002)(26005)(86362001)(2906002)(4326008)(186003)(9686003)(55016002)(82740400003)(83380400001)(82310400002)(47076004)(6506007)(53546011)(478600001)(81166007)(356005)(7696005)(336012)(70206006)(5660300002)(52536014)(54906003)(8676002)(110136005)(8936002)(70586007)(316002); DIR:OUT; SFP:1101; X-MS-Office365-Filtering-Correlation-Id-Prvs: 7176d3e4-91f2-4cda-e577-08d81694c1dc X-Forefront-PRVS: 0442E569BC X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: O0ZXNJWZj28FUkeAl1ukCUzhPl1qpLNLC5JnZ2Vxx/tJDtnpgbPR5l7Ao3jdLyYZ++E+GH4P90fT5AcXqhjLpEgdKWKlDb7W8PfjMLw1/T29QpmEh9sNQsM1ZsQD15cRLJR+oqIIUVcMEH1YfNSLleDwWS+WUwTacRBhgtGMSVVhMss7LHN62DAJ8lpG9jgzy8KU4jpae6rWaIonYriL4MUSdHWmrUzOQxeY6uDgnVDHDbAl6SwSHmKp9zKEjFcXABWDuoN2vL/XwmHyuF1CrZzCjcEcIdT5i2qeZMZAhjmbUS5TlFGsJ4/WYiQfb4dv1O1xAXn95lO3axPTPLWk/WQfS2R+6+qcKfor/mwI8Hy20c6i/o8AkIc+mpddiz5qQNaMZasLpntcJLzKFJ3a5w== X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jun 2020 10:12:31.0956 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 829ed328-ba8b-43f0-d3b6-08d81694c64f X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR08MB2821 Subject: Re: [dpdk-dev] [PATCH 3/3] eventdev: relax smp barriers with c11 atomics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: dev On Behalf Of Phil Yang > Sent: Friday, June 12, 2020 7:20 PM > To: dev@dpdk.org; erik.g.carrillo@intel.com > Cc: drc@linux.vnet.ibm.com; Honnappa Nagarahalli > ; Ruifeng Wang > ; Dharmik Thakkar ; > nd > Subject: [dpdk-dev] [PATCH 3/3] eventdev: relax smp barriers with c11 > atomics >=20 > The implementation-specific opaque data is shared between arm and cancel > operations. The state flag acts as a guard variable to make sure the > update of opaque data is synchronized. This patch uses c11 atomics with > explicit one way memory barrier instead of full barriers rte_smp_w/rmb() > to synchronize the opaque data between timer arm and cancel threads. >=20 > Signed-off-by: Phil Yang > Reviewed-by: Dharmik Thakkar > Reviewed-by: Ruifeng Wang > --- > lib/librte_eventdev/rte_event_timer_adapter.c | 55 > ++++++++++++++++++--------- > lib/librte_eventdev/rte_event_timer_adapter.h | 2 +- > 2 files changed, 38 insertions(+), 19 deletions(-) >=20 > diff --git a/lib/librte_eventdev/rte_event_timer_adapter.c > b/lib/librte_eventdev/rte_event_timer_adapter.c > index 6947efb..0a26501 100644 > --- a/lib/librte_eventdev/rte_event_timer_adapter.c > +++ b/lib/librte_eventdev/rte_event_timer_adapter.c > @@ -629,7 +629,8 @@ swtim_callback(struct rte_timer *tim) > sw->expired_timers[sw->n_expired_timers++] =3D tim; > sw->stats.evtim_exp_count++; >=20 > - evtim->state =3D RTE_EVENT_TIMER_NOT_ARMED; > + __atomic_store_n(&evtim->state, > RTE_EVENT_TIMER_NOT_ARMED, > + __ATOMIC_RELEASE); > } >=20 > if (event_buffer_batch_ready(&sw->buffer)) { > @@ -1020,6 +1021,7 @@ __swtim_arm_burst(const struct > rte_event_timer_adapter *adapter, > int n_lcores; > /* Timer is not armed state */ > int16_t exp_state =3D 0; > + enum rte_event_timer_state n_state; >=20 > #ifdef RTE_LIBRTE_EVENTDEV_DEBUG > /* Check that the service is running. */ > @@ -1060,30 +1062,36 @@ __swtim_arm_burst(const struct > rte_event_timer_adapter *adapter, > } >=20 > for (i =3D 0; i < nb_evtims; i++) { > - /* Don't modify the event timer state in these cases */ > - if (evtims[i]->state =3D=3D RTE_EVENT_TIMER_ARMED) { > + n_state =3D __atomic_load_n(&evtims[i]->state, > __ATOMIC_RELAXED); > + if (n_state =3D=3D RTE_EVENT_TIMER_ARMED) { > rte_errno =3D EALREADY; > break; > - } else if (!(evtims[i]->state =3D=3D > RTE_EVENT_TIMER_NOT_ARMED || > - evtims[i]->state =3D=3D > RTE_EVENT_TIMER_CANCELED)) { > + } else if (!(n_state =3D=3D RTE_EVENT_TIMER_NOT_ARMED || > + n_state =3D=3D RTE_EVENT_TIMER_CANCELED)) { > rte_errno =3D EINVAL; > break; > } >=20 > ret =3D check_timeout(evtims[i], adapter); > if (unlikely(ret =3D=3D -1)) { > - evtims[i]->state =3D > RTE_EVENT_TIMER_ERROR_TOOLATE; > + __atomic_store_n(&evtims[i]->state, > + RTE_EVENT_TIMER_ERROR_TOOLATE, > + __ATOMIC_RELAXED); > rte_errno =3D EINVAL; > break; > } else if (unlikely(ret =3D=3D -2)) { > - evtims[i]->state =3D > RTE_EVENT_TIMER_ERROR_TOOEARLY; > + __atomic_store_n(&evtims[i]->state, > + > RTE_EVENT_TIMER_ERROR_TOOEARLY, > + __ATOMIC_RELAXED); > rte_errno =3D EINVAL; > break; > } >=20 > if (unlikely(check_destination_event_queue(evtims[i], > adapter) < 0)) { > - evtims[i]->state =3D RTE_EVENT_TIMER_ERROR; > + __atomic_store_n(&evtims[i]->state, > + RTE_EVENT_TIMER_ERROR, > + __ATOMIC_RELAXED); > rte_errno =3D EINVAL; > break; > } > @@ -1099,13 +1107,18 @@ __swtim_arm_burst(const struct > rte_event_timer_adapter *adapter, > SINGLE, lcore_id, NULL, evtims[i]); > if (ret < 0) { > /* tim was in RUNNING or CONFIG state */ > - evtims[i]->state =3D RTE_EVENT_TIMER_ERROR; > + __atomic_store_n(&evtims[i]->state, > + RTE_EVENT_TIMER_ERROR, > + __ATOMIC_RELEASE); > break; > } >=20 > - rte_smp_wmb(); > EVTIM_LOG_DBG("armed an event timer"); > - evtims[i]->state =3D RTE_EVENT_TIMER_ARMED; > + /* RELEASE ordering guarantees the adapter specific value > + * changes observed before the update of state. > + */ > + __atomic_store_n(&evtims[i]->state, > RTE_EVENT_TIMER_ARMED, > + __ATOMIC_RELEASE); > } >=20 > if (i < nb_evtims) > @@ -1132,6 +1145,7 @@ swtim_cancel_burst(const struct > rte_event_timer_adapter *adapter, > struct rte_timer *timp; > uint64_t opaque; > struct swtim *sw =3D swtim_pmd_priv(adapter); > + enum rte_event_timer_state n_state; >=20 > #ifdef RTE_LIBRTE_EVENTDEV_DEBUG > /* Check that the service is running. */ > @@ -1143,16 +1157,18 @@ swtim_cancel_burst(const struct > rte_event_timer_adapter *adapter, >=20 > for (i =3D 0; i < nb_evtims; i++) { > /* Don't modify the event timer state in these cases */ > - if (evtims[i]->state =3D=3D RTE_EVENT_TIMER_CANCELED) { > + /* ACQUIRE ordering guarantees the access of > implementation > + * specific opague data under the correct state. > + */ > + n_state =3D __atomic_load_n(&evtims[i]->state, > __ATOMIC_ACQUIRE); > + if (n_state =3D=3D RTE_EVENT_TIMER_CANCELED) { > rte_errno =3D EALREADY; > break; > - } else if (evtims[i]->state !=3D RTE_EVENT_TIMER_ARMED) { > + } else if (n_state !=3D RTE_EVENT_TIMER_ARMED) { > rte_errno =3D EINVAL; > break; > } >=20 > - rte_smp_rmb(); > - > opaque =3D evtims[i]->impl_opaque[0]; > timp =3D (struct rte_timer *)(uintptr_t)opaque; > RTE_ASSERT(timp !=3D NULL); > @@ -1166,11 +1182,14 @@ swtim_cancel_burst(const struct > rte_event_timer_adapter *adapter, >=20 > rte_mempool_put(sw->tim_pool, (void **)timp); >=20 > - evtims[i]->state =3D RTE_EVENT_TIMER_CANCELED; > + __atomic_store_n(&evtims[i]->state, > RTE_EVENT_TIMER_CANCELED, > + __ATOMIC_RELAXED); > evtims[i]->impl_opaque[0] =3D 0; > evtims[i]->impl_opaque[1] =3D 0; Is that safe to remove impl_opaque cleanup above? Once the soft timer canceled, the __swtim_arm_burst cannot access these two= fields under the RTE_EVENT_TIMER_CANCELED state. After new timer armed, it refills these two fields in the __swtim_arm_burst= thread, which is the only producer of these two fields. I think the only risk is that the values of these two field might be unknow= after swtim_cancel_burst. =20 So it should be safe to remove them if no other thread access them after ca= nceling the timer.=20 Any comments on this? If we remove these two instructions, we can also remove the __atomic_thread= _fence below to save performance penalty. Thanks, Phil > - > - rte_smp_wmb(); > + /* The RELEASE fence make sure the clean up > + * of opaque data observed between threads. > + */ > + __atomic_thread_fence(__ATOMIC_RELEASE); > } >=20 > return i; > diff --git a/lib/librte_eventdev/rte_event_timer_adapter.h > b/lib/librte_eventdev/rte_event_timer_adapter.h > index d2ebcb0..6f64b90 100644 > --- a/lib/librte_eventdev/rte_event_timer_adapter.h > +++ b/lib/librte_eventdev/rte_event_timer_adapter.h > @@ -467,7 +467,7 @@ struct rte_event_timer { > * - op: RTE_EVENT_OP_NEW > * - event_type: RTE_EVENT_TYPE_TIMER > */ > - volatile enum rte_event_timer_state state; > + enum rte_event_timer_state state; > /**< State of the event timer. */ > uint64_t timeout_ticks; > /**< Expiry timer ticks expressed in number of *timer_ticks_ns* > from > -- > 2.7.4