From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR03-VE1-obe.outbound.protection.outlook.com (mail-eopbgr50047.outbound.protection.outlook.com [40.107.5.47]) by dpdk.org (Postfix) with ESMTP id CD2AF5F17; Fri, 3 May 2019 17:02:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4kT+/9xqHu5+ymVufdpRz+WnwRYpdaotv/IYLv7O+H4=; b=jFJNJ0b/1lHSymwjvbIJcd2YCNkV5HEIsmCtTTrl2RK/9rj3LVTlS6RC7rbQ8yHS1JElJv3AXPkEawrh6DZ4iBqnh5LUYKDeZibSghpW2XWZQFwWyHSuZLI67QuXxJLzRH8+O/aNxm+QQpUJyBMtzPjJo9HGjyWotLzysbFX/bA= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB5248.eurprd08.prod.outlook.com (20.179.31.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1856.11; Fri, 3 May 2019 15:02:15 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea%5]) with mapi id 15.20.1856.012; Fri, 3 May 2019 15:02:15 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" , "jerinj@marvell.com" , "thomas@monjalon.net" CC: "dev@dpdk.org" , "bruce.richardson@intel.com" , "pbhagavatula@marvell.com" , "shahafs@mellanox.com" , "Gavin Hu (Arm Technology China)" , "stable@dpdk.org" , Luca Boccassi , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH v2] build: disable armv8 crypto extension Thread-Index: AQHVAauzmkiFG4Tv5EaKa0BQLwiRC6ZZe7hg Date: Fri, 3 May 2019 15:02:15 +0000 Message-ID: References: <20190502015806.41497-1-yskoh@mellanox.com> <20190503122813.8938-1-yskoh@mellanox.com> In-Reply-To: <20190503122813.8938-1-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 1ead4763-fc7e-48d8-f1ff-08d6cfd8548c x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:VE1PR08MB5248; x-ms-traffictypediagnostic: VE1PR08MB5248: x-ms-exchange-purlcount: 1 x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr nodisclaimer: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; x-forefront-prvs: 0026334A56 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(376002)(39860400002)(136003)(346002)(366004)(396003)(199004)(189003)(13464003)(99286004)(2906002)(76176011)(102836004)(68736007)(73956011)(256004)(966005)(71200400001)(7696005)(71190400001)(486006)(186003)(74316002)(66556008)(64756008)(5660300002)(229853002)(11346002)(6116002)(3846002)(6506007)(53546011)(66476007)(446003)(55016002)(2501003)(66446008)(52536014)(8936002)(76116006)(316002)(8676002)(81156014)(81166006)(7736002)(14444005)(66946007)(72206003)(54906003)(2201001)(508600001)(66066001)(4326008)(25786009)(14454004)(6436002)(110136005)(6306002)(53936002)(476003)(305945005)(33656002)(9686003)(86362001)(26005)(6246003); DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB5248; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: IUE80EbnvYFUM2dQbVh+zbVGhICOccxhrRACcIW16pHnV5trUwl1zJ06TQucGGB4afpH4fJZPj7SZ+fE6aGoMekdQTGiaquT6mmdNyOSeQA6bgZFhG+xRomg9Si/4aCdPah3DtLBZ4mM8AvrimgmGRsx2IqJ3HIDeQA+eDiCBUuUCHwPxynpCvsEDnjXl3VEdofDlCvYGeVKsyI2hPzYKkaBcDXyEF/dM4Dd8RP8tQNkrhdeYJL+3zlm4N/d6jlO4AMyoF7iMOqPSve6rz8LrU+Ao9XILpWW5nZ4oAith063I+bPYR+IQ8g+Ksg6dBLER7j1VYzyr+VC4zmZtbINBlskJIJPZUC36/BoAqJNCFH5iM0lLy0xyLK6GPoYzz/5jbGyOc1IT/aipjC5UimRLmUwdqHuNc9T6VFUQ6gztjw= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1ead4763-fc7e-48d8-f1ff-08d6cfd8548c X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 15:02:15.6551 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5248 Subject: Re: [dpdk-dev] [PATCH v2] build: disable armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 May 2019 15:02:18 -0000 Hi Yongseok, We need to enable 'CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO' (which would requir= e a documentation change in [1]). I think this change might have an impact = on the existing users. Does this change need to be documented somewhere (at= least in the release notes)? [1] https://doc.dpdk.org/guides-19.02/cryptodevs/armv8.html > -----Original Message----- > From: Yongseok Koh > Sent: Friday, May 3, 2019 7:28 AM > To: jerinj@marvell.com; thomas@monjalon.net > Cc: dev@dpdk.org; bruce.richardson@intel.com; pbhagavatula@marvell.com; > shahafs@mellanox.com; Gavin Hu (Arm Technology China) > ; Honnappa Nagarahalli > ; stable@dpdk.org > Subject: [PATCH v2] build: disable armv8 crypto extension >=20 > Per armv8 crypto extension support, make build always enable it by defaul= t > as long as compiler supports the feature while meson build only enables i= t for > 'default' machine of generic armv8 architecture. >=20 > It is known that not all the armv8 platforms have the crypto extension. F= or > example, Mellanox BlueField has a variant which doesn't have it. If crypt= o > enabled binary runs on such a platform, rte_eal_init() fails. >=20 > '+crypto' flag currently implies only '+aes' and '+sha2' and enabling it = will > generate the crypto instructions only when crypto intrinsics are used. > For the devices supporting 8.2 crypto or newer, compiler could generate s= uch > instructions beyond intrinsics or asm code. For example, compiler can > generate 3-way exclusive OR instructions if sha3 is supported. However, i= t > has to be enabled by adding '+sha3' as of today. >=20 > In DPDK, armv8 cryptodev is the only one which requires the crypto suppor= t. > As it even uses external library of Marvell which is compiled out of DPDK= with > crypto support and there's run-time check for required cpuflags, crypto > support can be disabled in DPDK. >=20 > Cc: stable@dpdk.org >=20 > Signed-off-by: Yongseok Koh > --- >=20 > v2: > * disable crypto support instead of having a build config >=20 > config/arm/meson.build | 2 +- > mk/machine/armv8a/rte.vars.mk | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build index > 7fa6ed3105..abc8cf346c 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -74,7 +74,7 @@ flags_octeontx2_extra =3D [ > ['RTE_USE_C11_MEM_MODEL', true]] >=20 > machine_args_generic =3D [ > - ['default', ['-march=3Darmv8-a+crc+crypto']], > + ['default', ['-march=3Darmv8-a+crc']], IIRC, this would impact distro packaging as well. Adding Luca. > ['native', ['-march=3Dnative']], > ['0xd03', ['-mcpu=3Dcortex-a53']], > ['0xd04', ['-mcpu=3Dcortex-a35']], > diff --git a/mk/machine/armv8a/rte.vars.mk > b/mk/machine/armv8a/rte.vars.mk index 8252efbb7b..5e3ffc3adf 100644 > --- a/mk/machine/armv8a/rte.vars.mk > +++ b/mk/machine/armv8a/rte.vars.mk > @@ -28,4 +28,4 @@ > # CPU_LDFLAGS =3D > # CPU_ASFLAGS =3D >=20 > -MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc+crypto > +MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc > -- > 2.11.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 336BAA0AC5 for ; Fri, 3 May 2019 17:02:22 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 480875F1F; Fri, 3 May 2019 17:02:19 +0200 (CEST) Received: from EUR03-VE1-obe.outbound.protection.outlook.com (mail-eopbgr50047.outbound.protection.outlook.com [40.107.5.47]) by dpdk.org (Postfix) with ESMTP id CD2AF5F17; Fri, 3 May 2019 17:02:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4kT+/9xqHu5+ymVufdpRz+WnwRYpdaotv/IYLv7O+H4=; b=jFJNJ0b/1lHSymwjvbIJcd2YCNkV5HEIsmCtTTrl2RK/9rj3LVTlS6RC7rbQ8yHS1JElJv3AXPkEawrh6DZ4iBqnh5LUYKDeZibSghpW2XWZQFwWyHSuZLI67QuXxJLzRH8+O/aNxm+QQpUJyBMtzPjJo9HGjyWotLzysbFX/bA= Received: from VE1PR08MB5149.eurprd08.prod.outlook.com (20.179.30.152) by VE1PR08MB5248.eurprd08.prod.outlook.com (20.179.31.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1856.11; Fri, 3 May 2019 15:02:15 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::f5e3:39bc:e7d9:dfea%5]) with mapi id 15.20.1856.012; Fri, 3 May 2019 15:02:15 +0000 From: Honnappa Nagarahalli To: "yskoh@mellanox.com" , "jerinj@marvell.com" , "thomas@monjalon.net" CC: "dev@dpdk.org" , "bruce.richardson@intel.com" , "pbhagavatula@marvell.com" , "shahafs@mellanox.com" , "Gavin Hu (Arm Technology China)" , "stable@dpdk.org" , Luca Boccassi , Honnappa Nagarahalli , nd , nd Thread-Topic: [PATCH v2] build: disable armv8 crypto extension Thread-Index: AQHVAauzmkiFG4Tv5EaKa0BQLwiRC6ZZe7hg Date: Fri, 3 May 2019 15:02:15 +0000 Message-ID: References: <20190502015806.41497-1-yskoh@mellanox.com> <20190503122813.8938-1-yskoh@mellanox.com> In-Reply-To: <20190503122813.8938-1-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; x-originating-ip: [217.140.111.135] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 1ead4763-fc7e-48d8-f1ff-08d6cfd8548c x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:VE1PR08MB5248; x-ms-traffictypediagnostic: VE1PR08MB5248: x-ms-exchange-purlcount: 1 x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr nodisclaimer: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; x-forefront-prvs: 0026334A56 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(376002)(39860400002)(136003)(346002)(366004)(396003)(199004)(189003)(13464003)(99286004)(2906002)(76176011)(102836004)(68736007)(73956011)(256004)(966005)(71200400001)(7696005)(71190400001)(486006)(186003)(74316002)(66556008)(64756008)(5660300002)(229853002)(11346002)(6116002)(3846002)(6506007)(53546011)(66476007)(446003)(55016002)(2501003)(66446008)(52536014)(8936002)(76116006)(316002)(8676002)(81156014)(81166006)(7736002)(14444005)(66946007)(72206003)(54906003)(2201001)(508600001)(66066001)(4326008)(25786009)(14454004)(6436002)(110136005)(6306002)(53936002)(476003)(305945005)(33656002)(9686003)(86362001)(26005)(6246003); DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB5248; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: IUE80EbnvYFUM2dQbVh+zbVGhICOccxhrRACcIW16pHnV5trUwl1zJ06TQucGGB4afpH4fJZPj7SZ+fE6aGoMekdQTGiaquT6mmdNyOSeQA6bgZFhG+xRomg9Si/4aCdPah3DtLBZ4mM8AvrimgmGRsx2IqJ3HIDeQA+eDiCBUuUCHwPxynpCvsEDnjXl3VEdofDlCvYGeVKsyI2hPzYKkaBcDXyEF/dM4Dd8RP8tQNkrhdeYJL+3zlm4N/d6jlO4AMyoF7iMOqPSve6rz8LrU+Ao9XILpWW5nZ4oAith063I+bPYR+IQ8g+Ksg6dBLER7j1VYzyr+VC4zmZtbINBlskJIJPZUC36/BoAqJNCFH5iM0lLy0xyLK6GPoYzz/5jbGyOc1IT/aipjC5UimRLmUwdqHuNc9T6VFUQ6gztjw= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1ead4763-fc7e-48d8-f1ff-08d6cfd8548c X-MS-Exchange-CrossTenant-originalarrivaltime: 03 May 2019 15:02:15.6551 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB5248 Subject: Re: [dpdk-dev] [PATCH v2] build: disable armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190503150215.z_RBLnT0XgccM-Ns0eFbrgLHLwPg38btm5Bok4th95k@z> Hi Yongseok, We need to enable 'CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO' (which would requir= e a documentation change in [1]). I think this change might have an impact = on the existing users. Does this change need to be documented somewhere (at= least in the release notes)? [1] https://doc.dpdk.org/guides-19.02/cryptodevs/armv8.html > -----Original Message----- > From: Yongseok Koh > Sent: Friday, May 3, 2019 7:28 AM > To: jerinj@marvell.com; thomas@monjalon.net > Cc: dev@dpdk.org; bruce.richardson@intel.com; pbhagavatula@marvell.com; > shahafs@mellanox.com; Gavin Hu (Arm Technology China) > ; Honnappa Nagarahalli > ; stable@dpdk.org > Subject: [PATCH v2] build: disable armv8 crypto extension >=20 > Per armv8 crypto extension support, make build always enable it by defaul= t > as long as compiler supports the feature while meson build only enables i= t for > 'default' machine of generic armv8 architecture. >=20 > It is known that not all the armv8 platforms have the crypto extension. F= or > example, Mellanox BlueField has a variant which doesn't have it. If crypt= o > enabled binary runs on such a platform, rte_eal_init() fails. >=20 > '+crypto' flag currently implies only '+aes' and '+sha2' and enabling it = will > generate the crypto instructions only when crypto intrinsics are used. > For the devices supporting 8.2 crypto or newer, compiler could generate s= uch > instructions beyond intrinsics or asm code. For example, compiler can > generate 3-way exclusive OR instructions if sha3 is supported. However, i= t > has to be enabled by adding '+sha3' as of today. >=20 > In DPDK, armv8 cryptodev is the only one which requires the crypto suppor= t. > As it even uses external library of Marvell which is compiled out of DPDK= with > crypto support and there's run-time check for required cpuflags, crypto > support can be disabled in DPDK. >=20 > Cc: stable@dpdk.org >=20 > Signed-off-by: Yongseok Koh > --- >=20 > v2: > * disable crypto support instead of having a build config >=20 > config/arm/meson.build | 2 +- > mk/machine/armv8a/rte.vars.mk | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build index > 7fa6ed3105..abc8cf346c 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -74,7 +74,7 @@ flags_octeontx2_extra =3D [ > ['RTE_USE_C11_MEM_MODEL', true]] >=20 > machine_args_generic =3D [ > - ['default', ['-march=3Darmv8-a+crc+crypto']], > + ['default', ['-march=3Darmv8-a+crc']], IIRC, this would impact distro packaging as well. Adding Luca. > ['native', ['-march=3Dnative']], > ['0xd03', ['-mcpu=3Dcortex-a53']], > ['0xd04', ['-mcpu=3Dcortex-a35']], > diff --git a/mk/machine/armv8a/rte.vars.mk > b/mk/machine/armv8a/rte.vars.mk index 8252efbb7b..5e3ffc3adf 100644 > --- a/mk/machine/armv8a/rte.vars.mk > +++ b/mk/machine/armv8a/rte.vars.mk > @@ -28,4 +28,4 @@ > # CPU_LDFLAGS =3D > # CPU_ASFLAGS =3D >=20 > -MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc+crypto > +MACHINE_CFLAGS +=3D -march=3Darmv8-a+crc > -- > 2.11.0