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Tue, 2 Apr 2019 11:11:36 +0000 From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> To: Gage Eads <gage.eads@intel.com>, "dev@dpdk.org" <dev@dpdk.org> CC: "olivier.matz@6wind.com" <olivier.matz@6wind.com>, "arybchenko@solarflare.com" <arybchenko@solarflare.com>, "bruce.richardson@intel.com" <bruce.richardson@intel.com>, "konstantin.ananyev@intel.com" <konstantin.ananyev@intel.com>, "Gavin Hu (Arm Technology China)" <Gavin.Hu@arm.com>, nd <nd@arm.com>, "thomas@monjalon.net" <thomas@monjalon.net>, nd <nd@arm.com> Thread-Topic: [PATCH v6 6/8] stack: add C11 atomic implementation Thread-Index: AQHU6NAC354wUwf4UkC9Wyeo21N08KYot5Fw Date: Tue, 2 Apr 2019 11:11:36 +0000 Message-ID: <VE1PR08MB5149F0C4D5D3C4A2E2B01A1498560@VE1PR08MB5149.eurprd08.prod.outlook.com> References: <20190401001238.17625-1-gage.eads@intel.com> <20190401211429.20282-1-gage.eads@intel.com> <20190401211429.20282-7-gage.eads@intel.com> In-Reply-To: <20190401211429.20282-7-gage.eads@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:VE1PR08MB4800; H:VE1PR08MB5149.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: D4cgrysG+KEFnPDFRSPx/dJB/8do70J4lwgJp891DbeBJn0iJjbJeASuCHfwoPPzJRPVOI236kgzi4660VsDAZQiKNFjuavN3TUYq5l81cKr74vPT9xdZwAbX6H1CvF08quYrhP2KDayMCTXbbceG8jY/J4pC1HjEd0QU2eZy1ItL9Y9Gd9uy591GgzO0asjPtKHKmok3Tq0Ew4yHSUV+YzSVmdZDlENqSgYpkiluC/xq4IZyYYHXAmxlRScEYZvcpUnv3mPu3e+19F8JIfqrIySMzddmopO1QRkaPc7q6r7Jf4KbNIPRX7Dv0AoBmyUrKhk5IOj+VFIMak/IryrtEXRIrLpiqm8fK/d4qBvgR3c1zvHemitfanHWgz168y7QgK5Bk+yvrePCQn583a2W+yAuH3wNRkxhUxXJpJe340= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 389bb24d-f194-462e-c8ad-08d6b75bf919 X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Apr 2019 11:11:36.6856 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB4800 Subject: Re: [dpdk-dev] [PATCH v6 6/8] stack: add C11 atomic implementation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> X-List-Received-Date: Tue, 02 Apr 2019 11:11:39 -0000 > Subject: [PATCH v6 6/8] stack: add C11 atomic implementation >=20 > This commit adds an implementation of the lock-free stack push, pop, and > length functions that use __atomic builtins, for systems that benefit fro= m the > finer-grained memory ordering control. >=20 > Signed-off-by: Gage Eads <gage.eads@intel.com> > Reviewed-by: Olivier Matz <olivier.matz@6wind.com> > --- Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> <snip> From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <dev-bounces@dpdk.org> Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id B86A8A0679 for <public@inbox.dpdk.org>; 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Tue, 2 Apr 2019 11:11:36 +0000 Received: from VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::e0ae:ecad:ec5:8177]) by VE1PR08MB5149.eurprd08.prod.outlook.com ([fe80::e0ae:ecad:ec5:8177%2]) with mapi id 15.20.1750.017; Tue, 2 Apr 2019 11:11:36 +0000 From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> To: Gage Eads <gage.eads@intel.com>, "dev@dpdk.org" <dev@dpdk.org> CC: "olivier.matz@6wind.com" <olivier.matz@6wind.com>, "arybchenko@solarflare.com" <arybchenko@solarflare.com>, "bruce.richardson@intel.com" <bruce.richardson@intel.com>, "konstantin.ananyev@intel.com" <konstantin.ananyev@intel.com>, "Gavin Hu (Arm Technology China)" <Gavin.Hu@arm.com>, nd <nd@arm.com>, "thomas@monjalon.net" <thomas@monjalon.net>, nd <nd@arm.com> Thread-Topic: [PATCH v6 6/8] stack: add C11 atomic implementation Thread-Index: AQHU6NAC354wUwf4UkC9Wyeo21N08KYot5Fw Date: Tue, 2 Apr 2019 11:11:36 +0000 Message-ID: <VE1PR08MB5149F0C4D5D3C4A2E2B01A1498560@VE1PR08MB5149.eurprd08.prod.outlook.com> References: <20190401001238.17625-1-gage.eads@intel.com> <20190401211429.20282-1-gage.eads@intel.com> <20190401211429.20282-7-gage.eads@intel.com> In-Reply-To: <20190401211429.20282-7-gage.eads@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Honnappa.Nagarahalli@arm.com; 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