From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DE4ABA050C; Wed, 13 Apr 2022 17:32:13 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8A6E44068E; Wed, 13 Apr 2022 17:32:13 +0200 (CEST) Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2122.outbound.protection.outlook.com [40.107.20.122]) by mails.dpdk.org (Postfix) with ESMTP id CD77B4068B; Wed, 13 Apr 2022 17:32:11 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bFD28lQg08NnWYhLh52mjlRE0O5vSiF0/GclaiYfaElceKUoY80dhBlEW3Z38fJ9dgeskPJlMMl8Hq5fLqRV9UfqmZ6GIYQup9QiGDDVbi12ZaamLrV81bIMQvQeWVIjx1gKk99YGSc3O014nsTQU6tuxqRx4TMzk6nr0j124BrGLq/etTDvR2rkqc0z8+NbDHA946VgViI4Whb+vuJ5tlXZPTGHbIbxWKyFKww3VXx5MdyxGnDABM2ZvTmOhHtYBfReWGJhTWrTJF7Bnd0N7/RJM0/l5zLLuZBjZp2aR96UoalLAhD9D4CuZ+gwAqsj663Eke9/uZ1A/rD44/oFiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=uyA3rlJurzw6sZxsoKEYmD2YjnuG2WHXbnGUKq7NKuQ=; b=KpbplAyyPT800e1Vg0ljr1SkMHMBHjEGZgyxQYU026FPA1qusiqjUSZ8iVc6vV+txPLYVaQRBrbN7SwJ7uaFBXEMhfdy28FCMe3v0xUBCmwNXTI0xOeP0sr0Q/dvfB2KQdtZcGDQWa7YjVmwAXM0pzk68opc83RuytzHMaCxRefHdbHVhnx0ZiOc0vVJgywQFUF2kXidJexG0JpfA4+DEtgIYx3oq7RqMvaTXYAZpTp/Y3Mo9q/tbxef6UkUwofhXrJMvueKbCwqpkxbAiId4h3XYtrducMgqizvO0F1oyuItJVApmJZ8vgmkbCWnaIeFQC+odUB/bIGkPWJps8uJg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=silicom-usa.com; dmarc=pass action=none header.from=silicom-usa.com; dkim=pass header.d=silicom-usa.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=SILICOMLTD.onmicrosoft.com; s=selector2-SILICOMLTD-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=uyA3rlJurzw6sZxsoKEYmD2YjnuG2WHXbnGUKq7NKuQ=; b=eQCSzkpwNa6BWojlc0HRTxl9A4jLLYKInGb/NTSBa5elDvJ95+Ms/6AhkdriEPmdjEpAH8kIILiikAOpj1UInC1jFmNl6LsGh5G+YGeqjmbj+UVoi/lUlBPUq/gd/dsVnv/FvDPGcOs7VgKabAkCANBZUl0I7vfhpFA8PtwC5vU= Received: from VI1PR0402MB3517.eurprd04.prod.outlook.com (2603:10a6:803:b::16) by HE1PR04MB3210.eurprd04.prod.outlook.com (2603:10a6:7:1e::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5144.29; Wed, 13 Apr 2022 15:32:08 +0000 Received: from VI1PR0402MB3517.eurprd04.prod.outlook.com ([fe80::5dd5:47e1:1cef:cc4e]) by VI1PR0402MB3517.eurprd04.prod.outlook.com ([fe80::5dd5:47e1:1cef:cc4e%6]) with mapi id 15.20.5144.029; Wed, 13 Apr 2022 15:32:08 +0000 From: Jeff Daly To: "Wang, Haiyue" , "dev@dpdk.org" CC: "stable@dpdk.org" , Xiaolong Ye , Xiao Zhang , "Zhao1, Wei" , Lunyuan Cui Subject: RE: [PATCH v6 1/2] net/ixgbe: Limit SDP3 check of TX_DISABLE to appropriate devices Thread-Topic: [PATCH v6 1/2] net/ixgbe: Limit SDP3 check of TX_DISABLE to appropriate devices Thread-Index: AQHYTpSwwobSbfIIy06khKOe4ideBaztDHQAgADrtWA= Date: Wed, 13 Apr 2022 15:32:07 +0000 Message-ID: References: <20220228152937.21247-1-jeffd@silicom-usa.com> <20220412174220.31195-1-jeffd@silicom-usa.com> <20220412174220.31195-2-jeffd@silicom-usa.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=silicom-usa.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 8be46ee2-32ee-4990-ffd0-08da1d62c55c x-ms-traffictypediagnostic: HE1PR04MB3210:EE_ x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: b7G5qTdQQrfG0uY4TANzxjAB6Yl2NMA4Qy68UzfnLGhrNXT+Dwc9Hru6+cribNSbG33Q8/KAo48oYn2X7MUgFqtAXPnkph/tIsZvRMIksiX1YLLk/YlHdABf2mJN1AmKqmX6QKsIeSVubzWlT6dcMpC53kG420FLu9FsEPEJMlT2/w6r0G+nG/3YRaNqlMznPA1mecDD/HSWB11wn0gWdGsWisRMKQF5pEvdTWoicRwz72St+VnVKnJDeieCzQKXZmKMR5I3PxzA5XBf7LM9sqmrOzZ20gELs7vggzXxkO3hl84DZ1/Skh93FAKR6gzQlru8OCctr3Lcuy0ZOtQo+sw4f4GJTU7gFeaGKDh+Qo4Gj5nBU3miuM9tGinYy+ld5GhASaJRYWbTrk5R2DZ7e53d4p+ROzEAE74NjTAn0M6M45KtHkiCkjURsvZ27wleBZIt0Pa0j7L6Nd5Jv4iKsGnJIg19ZkRVWVXGrgJiFAVut2mh5NgEf/+kPwWu8x3enBmq9ZSzsKgPmtcQn86CdwGq+QGFDoIKdXX+reCbJjaKkUbKFnSBiPgupqnuZesdbW7A6i7w15phdx7pB7v4A77gPRC5Oh2AW+01ho5O7pau3GRcbI3TXO70kg4jqPDa0YnjiGL23L+5nwGA8hpqUpCRgR2+Y2VUUVwQQbyVe4xaLJSr+ATXPJkczmcCOk6QJ7xSAhNCyb4ZR2xrKSfuXc+5xrAwcS4tu2zDsWGSXpY= x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR0402MB3517.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230001)(4636009)(366004)(9686003)(71200400001)(26005)(7696005)(110136005)(508600001)(54906003)(316002)(86362001)(83380400001)(66476007)(66446008)(38070700005)(66556008)(6506007)(76116006)(33656002)(64756008)(53546011)(2906002)(66946007)(186003)(5660300002)(52536014)(55016003)(8936002)(4326008)(38100700002)(8676002)(122000001)(21314003); DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?OcPHI3/256mOMdQv63e3iA7a27kFUs0I+gc9P+t43p3A8iiJOoaLVX2MMfAs?= =?us-ascii?Q?DG7kkMxg5mPkRdZ8VQSK4dC/ob2bk07eCEW/ksUnq8wLfAutLHI0S7tHg6XN?= =?us-ascii?Q?f1oR8v9TTQN2rmn3bNeALiJp495779Aiqj8fMUTnL9Wjb8ViIOEg9dy5WkZu?= =?us-ascii?Q?VNdA4JiPJnLHMD/kK58afRV3QSKdgjWag9MzuJuCFu/5t3JW1el/63o9tEQG?= =?us-ascii?Q?npqfbSKiYNuzevUCRJMXIb5MCdAQhPe1uzhVfOlEvkC1XXKR+u9YGjkOcqiM?= =?us-ascii?Q?Q8r8nZNWmAMz0yvc/1NNnLhGhJ4f5coWpX8nW26fHjAb/4lf9ZpEiZSwrCXs?= =?us-ascii?Q?qaWfclYEKgxhMgUHNnbseu41P+3gQ/qUNOAlUZ6RIrvujsJ6D3TCntgsx4Dp?= =?us-ascii?Q?X7Iij2q5w8rfrp/9Nmwc6GTxGWyo0UauBxNorzjck6T/Yl3syVAttY93UzZq?= =?us-ascii?Q?GXn4tvpNxnH/DeMMVYhLfkSHVpnDjDdMvq+1GoxwvaeQktue3avPOgXkP+3s?= =?us-ascii?Q?oxNr6bT/XEZnwNxEa+vCVECMc9fkxbEyEKx6dFhWmujqnB54tmeWFpISGZKu?= =?us-ascii?Q?KI2JlfSqtu4YVhpWgEgYTqP7gB1h5n2EDrYLKGLrNly6jPt6e8xL/l64ZKkE?= =?us-ascii?Q?BEX2qlaeUW0U1flIFzOV7/hjtcOXSpAcdVFflhWbVX9w86TvO/HTM+iprapS?= =?us-ascii?Q?DtoA44ciS1rlIablGF9fnSI6oyZV90Ag8Su1eYxHQWV4tfoV3jTs114UyP9B?= =?us-ascii?Q?tEi8+9XbvUntP9kNYzEoVJSEbbro+GKxW47Zmp2aAzJAAgTbkZQnx4gmICK6?= =?us-ascii?Q?qny13PZNMSaENWla9zUgbB0Z6IvsUjgbgRB9CLqXgOPKvBwgzJKg0U+HtCrh?= =?us-ascii?Q?Izry1sc3x7Lhfk5wCKnwvtRdKbIEO6WDg9NcgiiWJdzcpMi+/nb3DjSiNXbO?= =?us-ascii?Q?Dlv8FbdjOYe+qN7kf0F9tgAo6msd3BW8ZVvGuvu+mnzNzhB0S/ZifiKO9TlA?= =?us-ascii?Q?alwHYUWNfGtTW6xAEX8aQ2YIgmZDf7wnrSltL1hgMVTYXrDkofHJcn5wBMYE?= =?us-ascii?Q?I5ne+ATS8dEwHe4z/70nW3U6Tsw9oPwXA6UwhpC/HL5TUcNJSw292Vi0KP7/?= =?us-ascii?Q?IAYFqzdHtufYX/L3ChdlEibmRPYQ2eZRL9wjwpTsGzkFYcavEhRP1CWSiNDn?= =?us-ascii?Q?GJghdTNYp27G6cBTHJELN9lV4GtO5aO6LvsSODKWyL7Y3eWj60JcoR0F4qcc?= =?us-ascii?Q?aqg4SFeOCZPgeP5Tp8qp+MQuN+95+87xvWh6DLcMuu0iWagKt3GXL2b0uZCe?= =?us-ascii?Q?AIvBwPUW5U9iBP81uPpfxokjiqnHxgYSOshZRDZO/RPDD6+g0HV49eEitdEL?= =?us-ascii?Q?OcpxgfHPeyn6C4LnLjqGI8QzEo47mJwG2FZhCLC/QKLqZ4sQjaVm4Ztesg+/?= =?us-ascii?Q?ZX/KFFfmvitwLdE9Z7T6jxeXahvVnActx5ekk7bx5K/aczOyXxcA8Ge3XdUu?= =?us-ascii?Q?BIpfcJWT9cxFkF3J8zQHI/sojyqW6CpUmA6dpgvahpRvghhlpURG95Pazt+a?= =?us-ascii?Q?mpiMxCLfZGqdDrQMD8eDY32LAKyFsyDyjLChNWtM7HY+SspL33A0sMglL6Nc?= =?us-ascii?Q?sCK0sc5UM+yOl5dcfPRoVVaaTfJpnpApBSLbuW8qOAPZwibEPmcSIh9QnZcE?= =?us-ascii?Q?vFOpBFu5jMkL9tgIdf2WCr3wVde8TZAPfnXO/tVg4PrS87nrrzE1/n36fwGJ?= =?us-ascii?Q?BtaGDkKDhA=3D=3D?= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: silicom-usa.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3517.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8be46ee2-32ee-4990-ffd0-08da1d62c55c X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Apr 2022 15:32:08.0147 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: c9e326d8-ce47-4930-8612-cc99d3c87ad1 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: iISL5j1ynpVWU7EnUMYBmgsaRv05Mge4wrBq6z+aB3GGHCJAnu5ubrObToI0YlMIBx8C/7Yno9JjSQ1ywyD+DA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR04MB3210 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Wang, Haiyue > Sent: Tuesday, April 12, 2022 9:22 PM > To: Jeff Daly ; dev@dpdk.org > Cc: stable@dpdk.org; Xiaolong Ye ; Xiao Zhang > ; Zhao1, Wei ; Lunyuan Cui > > Subject: RE: [PATCH v6 1/2] net/ixgbe: Limit SDP3 check of TX_DISABLE to > appropriate devices >=20 > Caution: This is an external email. Please take care when clicking links = or > opening attachments. >=20 >=20 > > -----Original Message----- > > From: Jeff Daly > > Sent: Wednesday, April 13, 2022 01:42 > > To: dev@dpdk.org > > Cc: stable@dpdk.org; Wang, Haiyue ; Xiaolong Ye > > ; Xiao Zhang ; Zhao1, Wei > > ; Lunyuan Cui > > Subject: [PATCH v6 1/2] net/ixgbe: Limit SDP3 check of TX_DISABLE to > > appropriate devices > > > > 1ca05831b9b added a check that SDP3 (used as a TX_DISABLE output to > > the SFP cage on these cards) is not asserted to avoid incorrectly > > reporting link up when the SFP's laser is turned off. > > > > ff8162cb957 limited this workaround to fiber ports > > > > This patch: > > * Adds devarg 'fiber_sdp3_no_tx_disable' not all fiber ixgbe devs use > > SDP3 as TX_DISABLE > > > > Fixes: 1ca05831b9b ("net/ixgbe: fix link status") > > Fixes: ff8162cb957 ("net/ixgbe: fix link status") > > Cc: stable@dpdk.org >=20 > This is new for soc for BIG change, not cc to stable. >=20 > > > > Signed-off-by: Jeff Daly > > --- > > drivers/net/ixgbe/ixgbe_ethdev.c | 39 > > +++++++++++++++++++++++++++++++- drivers/net/ixgbe/ixgbe_ethdev.h | > > 3 +++ > > 2 files changed, 41 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c > > b/drivers/net/ixgbe/ixgbe_ethdev.c > > index 2da3f67bbc..f31bbb7895 100644 > > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > > @@ -128,6 +128,13 @@ > > #define IXGBE_EXVET_VET_EXT_SHIFT 16 > > #define IXGBE_DMATXCTL_VT_MASK 0xFFFF0000 > > > > +#define IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE > "fiber_sdp3_no_tx_disable" > > + >=20 > 'platform' may be a good arg for the soc related change. >=20 > dpdk-testpmd -a af:10.0,platform=3Dxxx - -i >=20 > enum ixgbe_platform_type { > ixgbe_platform_unknown =3D 0, > ixgbe_platform_soc_atom, ??? You can specify it. >=20 >=20 >=20 > enum ixgbe_media_type ixgbe_get_platform_type(xxx) { > return xxx; > } >=20 This patchset is not explicitly for SoC platform support. *Any* implementa= tion may or may not use SDP3 as TX_DISABLE. The previous version of the patch added a check for t= he mac being an 82599 that uses fiber SFP rather than just a fiber SFP. Our platform specifically can= be fiber SFP, but TX_DISABLE=20 is not SDP3. However, our platform may not be the only implementation that= doesn't use SDP3 this way. It does seem that *most* implementations out there do use SDP3 this way, so= our platform would be the setting this option to 1 to skip this check while any others would work= the same as before. >=20 > > +static const char * const ixgbe_valid_arguments[] =3D { > > + IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE, > > + NULL > > +}; > > + > > #define IXGBEVF_DEVARG_PFLINK_FULLCHK "pflink_fullchk" > > > > static const char * const ixgbevf_valid_arguments[] =3D { @@ -348,6 > > +355,8 @@ static int ixgbe_dev_udp_tunnel_port_del(struct rte_eth_dev > > *dev, static int ixgbe_filter_restore(struct rte_eth_dev *dev); > > static void ixgbe_l2_tunnel_conf(struct rte_eth_dev *dev); static int > > ixgbe_wait_for_link_up(struct ixgbe_hw *hw); > > +static int devarg_handle_int(__rte_unused const char *key, const char > *value, > > + void *extra_args); > > > > /* > > * Define VF Stats MACRO for Non "cleared on read" register @@ > > -1032,6 +1041,29 @@ ixgbe_swfw_lock_reset(struct ixgbe_hw *hw) > > ixgbe_release_swfw_semaphore(hw, mask); } > > > > +static void > > +ixgbe_parse_devargs(struct ixgbe_adapter *adapter, > > + struct rte_devargs *devargs) { > > + struct rte_kvargs *kvlist; > > + uint16_t sdp3_no_tx_disable; > > + > > + if (devargs =3D=3D NULL) > > + return; > > + > > + kvlist =3D rte_kvargs_parse(devargs->args, ixgbe_valid_arguments)= ; > > + if (kvlist =3D=3D NULL) > > + return; > > + > > + if (rte_kvargs_count(kvlist, > IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE) =3D=3D 1 && > > + rte_kvargs_process(kvlist, > IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE, > > + devarg_handle_int, &sdp3_no_tx_disable) = =3D=3D 0 && > > + sdp3_no_tx_disable =3D=3D 1) > > + adapter->sdp3_no_tx_disable =3D 1; > > + > > + rte_kvargs_free(kvlist); > > +} > > + > > /* > > * This function is based on code in ixgbe_attach() in base/ixgbe.c. > > * It returns 0 on success. > > @@ -1095,6 +1127,8 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev, > void *init_params __rte_unused) > > } > > > > rte_atomic32_clear(&ad->link_thread_running); > > + ixgbe_parse_devargs(eth_dev->data->dev_private, > > + pci_dev->device.devargs); > > rte_eth_copy_pci_info(eth_dev, pci_dev); > > eth_dev->data->dev_flags |=3D RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; > > > > @@ -4261,7 +4295,8 @@ ixgbe_dev_link_update_share(struct rte_eth_dev > *dev, > > return rte_eth_linkstatus_set(dev, &link); > > } > > > > - if (ixgbe_get_media_type(hw) =3D=3D ixgbe_media_type_fiber) { > > + if (ixgbe_get_media_type(hw) =3D=3D ixgbe_media_type_fiber && > > + !ad->sdp3_no_tx_disable) { > > esdp_reg =3D IXGBE_READ_REG(hw, IXGBE_ESDP); > > if ((esdp_reg & IXGBE_ESDP_SDP3)) > > link_up =3D 0; > > @@ -8250,6 +8285,8 @@ ixgbe_dev_macsec_register_disable(struct > > rte_eth_dev *dev) RTE_PMD_REGISTER_PCI(net_ixgbe, rte_ixgbe_pmd); > > RTE_PMD_REGISTER_PCI_TABLE(net_ixgbe, pci_id_ixgbe_map); > > RTE_PMD_REGISTER_KMOD_DEP(net_ixgbe, "* igb_uio | uio_pci_generic | > > vfio-pci"); > > +RTE_PMD_REGISTER_PARAM_STRING(net_ixgbe, > > + IXGBE_DEVARG_FIBER_SDP3_NOT_TX_DISABLE > > +"=3D<0|1>"); > > RTE_PMD_REGISTER_PCI(net_ixgbe_vf, rte_ixgbevf_pmd); > > RTE_PMD_REGISTER_PCI_TABLE(net_ixgbe_vf, pci_id_ixgbevf_map); > > RTE_PMD_REGISTER_KMOD_DEP(net_ixgbe_vf, "* igb_uio | vfio-pci"); diff > > --git a/drivers/net/ixgbe/ixgbe_ethdev.h > > b/drivers/net/ixgbe/ixgbe_ethdev.h > > index 69e0e82a5b..cc6049a66a 100644 > > --- a/drivers/net/ixgbe/ixgbe_ethdev.h > > +++ b/drivers/net/ixgbe/ixgbe_ethdev.h > > @@ -501,6 +501,9 @@ struct ixgbe_adapter { > > /* For RSS reta table update */ > > uint8_t rss_reta_updated; > > > > + /* Used for limiting SDP3 TX_DISABLE checks */ > > + uint8_t sdp3_no_tx_disable; > > + > > /* Used for VF link sync with PF's physical and logical (by check= ing > > * mailbox status) link status. > > */ > > -- > > 2.25.1