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Sun, 14 Jun 2020 10:28:57 +0000 Received: from VI1PR05MB6718.eurprd05.prod.outlook.com ([fe80::bc68:25c4:b452:f24d]) by VI1PR05MB6718.eurprd05.prod.outlook.com ([fe80::bc68:25c4:b452:f24d%9]) with mapi id 15.20.3088.028; Sun, 14 Jun 2020 10:28:57 +0000 From: Raslan Darawsheh To: Gregory Etelson , "dev@dpdk.org" CC: Matan Azrad Thread-Topic: [PATCH 1/1] net/mlx5: fix flow memory allocation size Thread-Index: AQHWPa4r0fXBFu+q6EeCMzvXz3nFNqjX8cQA Date: Sun, 14 Jun 2020 10:28:56 +0000 Message-ID: References: <20200608160156.20546-1-getelson@mellanox.com> <20200608160156.20546-2-getelson@mellanox.com> In-Reply-To: <20200608160156.20546-2-getelson@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: mellanox.com; dkim=none (message not signed) header.d=none;mellanox.com; dmarc=none action=none header.from=mellanox.com; x-originating-ip: [84.242.49.134] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: a7389fc8-03f1-428e-6725-08d8104dbec7 x-ms-traffictypediagnostic: VI1PR05MB6063: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:4941; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: a7389fc8-03f1-428e-6725-08d8104dbec7 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Jun 2020 10:28:56.9890 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: UhI/y+7QYZKRoSkpj+ypwIJ6rbIMrq4wCIxi//HukfBnNBrYyPZOmbEF9Rojf+hMoBTwSncKRou7TcMDy4O6ag== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR05MB6063 Subject: Re: [dpdk-dev] [PATCH 1/1] net/mlx5: fix flow memory allocation size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, > -----Original Message----- > From: Gregory Etelson > Sent: Monday, June 8, 2020 7:02 PM > To: dev@dpdk.org > Cc: Gregory Etelson ; Matan Azrad > ; Raslan Darawsheh > Subject: [PATCH 1/1] net/mlx5: fix flow memory allocation size >=20 > In DV enabled MLX5 PMD build > mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size > was initiated for DV structure. If RTE initialization encountered MLX5 > PCI function with disabled DV support > mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size was reduced to match > legacy > verbs flow size. Since mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW] is a > global variable that change reflected on DV enabled MLX5 PCI functions > too. >=20 > Running flow with invalid ipool size crashes PMD. >=20 > The patch adjusts ipool flow size for each active PCI function. >=20 > Fixes: b88341ca35fc ("net/mlx5: convert flow dev handle to indexed") >=20 > Signed-off-by: Gregory Etelson > Acked-by: Matan Azrad > --- > drivers/net/mlx5/mlx5.c | 40 +++++++++++++++++++++++++--------------- > 1 file changed, 25 insertions(+), 15 deletions(-) >=20 > diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c > index 5589772eb8..145021ef0f 100644 > --- a/drivers/net/mlx5/mlx5.c > +++ b/drivers/net/mlx5/mlx5.c > @@ -198,7 +198,7 @@ struct mlx5_dev_spawn_data { > static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list =3D > LIST_HEAD_INITIALIZER(); > static pthread_mutex_t mlx5_ibv_list_mutex =3D > PTHREAD_MUTEX_INITIALIZER; >=20 > -static struct mlx5_indexed_pool_config mlx5_ipool_cfg[] =3D { > +static const struct mlx5_indexed_pool_config mlx5_ipool_cfg[] =3D { > #ifdef HAVE_IBV_FLOW_DV_SUPPORT > { > .size =3D sizeof(struct mlx5_flow_dv_encap_decap_resource), > @@ -290,7 +290,11 @@ static struct mlx5_indexed_pool_config > mlx5_ipool_cfg[] =3D { > .type =3D "mlx5_hrxq_ipool", > }, > { > - .size =3D sizeof(struct mlx5_flow_handle), > + /* > + * MLX5_IPOOL_MLX5_FLOW size varies for DV and VERBS > flows. > + * It set in run time according to PCI function configuration. > + */ > + .size =3D 0, > .trunk_size =3D 64, > .grow_trunk =3D 3, > .grow_shift =3D 2, > @@ -562,22 +566,28 @@ mlx5_flow_counters_mng_close(struct > mlx5_ibv_shared *sh) > */ > static void > mlx5_flow_ipool_create(struct mlx5_ibv_shared *sh, > - const struct mlx5_dev_config *config __rte_unused) > + const struct mlx5_dev_config *config) > { > uint8_t i; > + struct mlx5_indexed_pool_config cfg; >=20 > -#ifdef HAVE_IBV_FLOW_DV_SUPPORT > - /* > - * While DV is supported, user chooses the verbs mode, > - * the mlx5 flow handle size is different with the > - * MLX5_FLOW_HANDLE_VERBS_SIZE. > - */ > - if (!config->dv_flow_en) > - mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size =3D > - MLX5_FLOW_HANDLE_VERBS_SIZE; > -#endif > - for (i =3D 0; i < MLX5_IPOOL_MAX; ++i) > - sh->ipool[i] =3D mlx5_ipool_create(&mlx5_ipool_cfg[i]); > + for (i =3D 0; i < MLX5_IPOOL_MAX; ++i) { > + cfg =3D mlx5_ipool_cfg[i]; > + switch (i) { > + default: > + break; > + /* > + * Set MLX5_IPOOL_MLX5_FLOW ipool size > + * according to PCI function flow configuration. > + */ > + case MLX5_IPOOL_MLX5_FLOW: > + cfg.size =3D config->dv_flow_en ? > + sizeof(struct mlx5_flow_handle) : > + MLX5_FLOW_HANDLE_VERBS_SIZE; > + break; > + } > + sh->ipool[i] =3D mlx5_ipool_create(&cfg); > + } > } >=20 > /** > -- > 2.25.1 Patch rebased and applied to next-net-mlx, Kindest regards, Raslan Darawsheh