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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 51d2870e-f683-4e79-7bf7-08d7a5852896 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Jan 2020 13:06:02.4984 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 0ht9v9ZqdbaMCvuF1MO++QSgnrF7/soCe1c1BZ4fd0354xaqlwVQzGwxOPL4YHMj+IlQ1o/6SXbhdEhXIvxSUA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR05MB6462 Subject: Re: [dpdk-dev] [PATCH] net/mlx5: make FDB default rule optional X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, > -----Original Message----- > From: dev On Behalf Of Matan Azrad > Sent: Tuesday, January 28, 2020 7:07 PM > To: Slava Ovsiienko > Cc: dev@dpdk.org; stable@dpdk.org > Subject: [dpdk-dev] [PATCH] net/mlx5: make FDB default rule optional >=20 > There are RDMA-CORE versions which are not supported multi-table for > some Mellanox mlx5 devices. >=20 > Hence, the optimization added in commit [1] which forwards all the FDB > traffic to table 1 cannot be configured. >=20 > Make the above optimization optional: > Do not fail when either table 1 cannot be created or the jump rule > (all =3D>jump to table 1) is not configured successfully. > In this case, all the flows will be configured to table 0. >=20 > [1] commit b67b4ecbde22 ("net/mlx5: skip table zero to improve > insertion rate") >=20 > Cc: stable@dpdk.org >=20 > Signed-off-by: Matan Azrad > --- > drivers/net/mlx5/mlx5.h | 1 + > drivers/net/mlx5/mlx5_flow.c | 6 ++++-- > drivers/net/mlx5/mlx5_flow.h | 4 ++-- > drivers/net/mlx5/mlx5_flow_dv.c | 11 ++++++----- > drivers/net/mlx5/mlx5_trigger.c | 11 ++++++++--- > 5 files changed, 21 insertions(+), 12 deletions(-) >=20 > diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h > index 5818349..1fc2063 100644 > --- a/drivers/net/mlx5/mlx5.h > +++ b/drivers/net/mlx5/mlx5.h > @@ -792,6 +792,7 @@ struct mlx5_priv { > /* UAR same-page access control required in 32bit implementations. > */ > #endif > uint8_t skip_default_rss_reta; /* Skip configuration of default reta. > */ > + uint8_t fdb_def_rule; /* Whether fdb jump to table 1 is configured. > */ > }; >=20 > #define PORT_ID(priv) ((priv)->dev_data->port_id) > diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c > index 5c9fea6..ffaf8a2 100644 > --- a/drivers/net/mlx5/mlx5_flow.c > +++ b/drivers/net/mlx5/mlx5_flow.c > @@ -5575,6 +5575,8 @@ struct mlx5_flow_counter * > * Value is part of flow rule created by request external to PMD. > * @param[in] group > * rte_flow group index value. > + * @param[out] fdb_def_rule > + * Whether fdb jump to table 1 is configured. > * @param[out] table > * HW table value. > * @param[out] error > @@ -5585,10 +5587,10 @@ struct mlx5_flow_counter * > */ > int > mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool > external, > - uint32_t group, uint32_t *table, > + uint32_t group, bool fdb_def_rule, uint32_t *table, > struct rte_flow_error *error) > { > - if (attributes->transfer && external) { > + if (attributes->transfer && external && fdb_def_rule) { > if (group =3D=3D UINT32_MAX) > return rte_flow_error_set > (error, EINVAL, > diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h > index 39be5ba..82b4292 100644 > --- a/drivers/net/mlx5/mlx5_flow.h > +++ b/drivers/net/mlx5/mlx5_flow.h > @@ -753,8 +753,8 @@ struct mlx5_flow_driver_ops { > uint32_t mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, > uint32_t id); > int mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, > - bool external, uint32_t group, uint32_t *table, > - struct rte_flow_error *error); > + bool external, uint32_t group, bool fdb_def_rule, > + uint32_t *table, struct rte_flow_error *error); > uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, int > tunnel, > uint64_t layer_types, > uint64_t hash_fields); > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c > b/drivers/net/mlx5/mlx5_flow_dv.c > index b90734e..d57d360 100644 > --- a/drivers/net/mlx5/mlx5_flow_dv.c > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > @@ -3357,7 +3357,7 @@ struct field_modify_info modify_tcp[] =3D { > target_group =3D > ((const struct rte_flow_action_jump *)action->conf)->group; > ret =3D mlx5_flow_group_to_table(attributes, external, target_group, > - &table, error); > + true, &table, error); > if (ret) > return ret; > if (attributes->group =3D=3D target_group) > @@ -4334,7 +4334,7 @@ struct field_modify_info modify_tcp[] =3D { > int ret; >=20 > ret =3D mlx5_flow_group_to_table(attributes, external, > - attributes->group, > + attributes->group, !!priv->fdb_def_rule, > &table, error); > if (ret) > return ret; > @@ -7011,7 +7011,7 @@ struct field_modify_info modify_tcp[] =3D { > mhdr_res->ft_type =3D attr->egress ? > MLX5DV_FLOW_TABLE_TYPE_NIC_TX : >=20 > MLX5DV_FLOW_TABLE_TYPE_NIC_RX; > ret =3D mlx5_flow_group_to_table(attr, dev_flow->external, attr- > >group, > - &table, error); > + !!priv->fdb_def_rule, &table, error); > if (ret) > return ret; > dev_flow->group =3D table; > @@ -7279,8 +7279,9 @@ struct field_modify_info modify_tcp[] =3D { > case RTE_FLOW_ACTION_TYPE_JUMP: > jump_data =3D action->conf; > ret =3D mlx5_flow_group_to_table(attr, dev_flow- > >external, > - jump_data->group, > &table, > - error); > + jump_data->group, > + !!priv->fdb_def_rule, > + &table, error); > if (ret) > return ret; > tbl =3D flow_dv_tbl_resource_get(dev, table, > diff --git a/drivers/net/mlx5/mlx5_trigger.c > b/drivers/net/mlx5/mlx5_trigger.c > index ab6937a..7e12cd5 100644 > --- a/drivers/net/mlx5/mlx5_trigger.c > +++ b/drivers/net/mlx5/mlx5_trigger.c > @@ -423,9 +423,14 @@ > } > mlx5_txq_release(dev, i); > } > - if (priv->config.dv_esw_en && !priv->config.vf) > - if (!mlx5_flow_create_esw_table_zero_flow(dev)) > - goto error; > + if (priv->config.dv_esw_en && !priv->config.vf) { > + if (mlx5_flow_create_esw_table_zero_flow(dev)) > + priv->fdb_def_rule =3D 1; > + else > + DRV_LOG(INFO, "port %u FDB default rule cannot > be" > + " configured - only Eswitch group 0 flows are" > + " supported.", dev->data->port_id); > + } > if (priv->isolated) > return 0; > if (dev->data->promiscuous) { > -- > 1.8.3.1 Patch applied to next-net-mlx, Kindest regards, Raslan Darawsheh