Re: [dpdk-dev] [PATCH v1] config: remap flags used for Arm platforms

[Ruifeng Wang <Ruifeng.Wang@arm.com>]

Hi Jerin,

Do you have any comments on this change?

Thanks.
/Ruifeng

> -----Original Message-----
> From: Ruifeng Wang <ruifeng.wang@arm.com>
> Sent: Friday, September 11, 2020 11:40 PM
> To: Bruce Richardson <bruce.richardson@intel.com>; Vladimir Medvedkin
> <vladimir.medvedkin@intel.com>; thomas@monjalon.net;
> hemant.agrawal@nxp.com; Sachin.saxena@nxp.com; Wei Zhao
> <wei.zhao1@intel.com>; Jeff Guo <jia.guo@intel.com>; Maxime Coquelin
> <maxime.coquelin@redhat.com>; Chenbo Xia <chenbo.xia@intel.com>;
> Zhihong Wang <zhihong.wang@intel.com>; Konstantin Ananyev
> <konstantin.ananyev@intel.com>; Jan Viktorin <viktorin@rehivetech.com>;
> Ruifeng Wang <Ruifeng.Wang@arm.com>
> Cc: dev@dpdk.org; jerinj@marvell.com; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Phil Yang <Phil.Yang@arm.com>; nd
> <nd@arm.com>
> Subject: [PATCH v1] config: remap flags used for Arm platforms
> 
> RTE_ARCH_xx flags are used to distinguish platform architectures.
> These flags can be used to pick different code paths for different
> architectures at compile time.
> For Arm platforms, there are 3 flags in use: RTE_ARCH_ARM,
> RTE_ARCH_ARMv7 and RTE_ARCH_ARM64.
> RTE_ARCH_ARM64 is for 64-bit aarch64 platforms, and RTE_ARCH_ARM &
> RTE_ARCH_ARMv7 are for 32-bit platforms.
> RTE_ARCH_ARMv7 is for ARMv7 platforms as its name suggested.
> 
> The issue is meaning of RTE_ARCH_ARM is not clear enough.
> Because no info about platform word length is included in the name.
> To make the flag names more clear, a naming scheme is proposed.
> 
> RTE_ARCH_ARM (all Arm platforms)
>     |
>     +----RTE_ARCH_32 (New. 32-bit platforms of all architectures)
>     |        |
>     |        +----RTE_ARCH_ARMv7 (ARMv7 platforms)
>     |        |
>     |        +----RTE_ARCH_ARMv8_AARCH32 (aarch32 state on aarch64 machine)
>     |
>     +----RTE_ARCH_64 (64-bit platforms of all architectures)
>              |
>              +----RTE_ARCH_ARM64 (64-bit Arm platforms)
> 
> RTE_ARCH_32 will be explicitly defined for 32-bit platforms.
> 
> To fit into the new naming scheme, current usage of RTE_ARCH_ARM in
> project is mapped to (RTE_ARCH_ARM && RTE_ARCH_32).
> 
> Matching flags for other architectures are:
> RTE_ARCH_X86
>     |
>     +----RTE_ARCH_32
>     |        |
>     |        +----RTE_ARCH_I686
>     |        |
>     |        +----RTE_ARCH_X86_X32
>     |
>     +----RTE_ARCH_64
>              |
>              +----RTE_ARCH_X86_64
> 
> RTE_ARCH_PPC_64 ---- RTE_ARCH_64
> 
> Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
> Reviewed-by: Phil Yang <phil.yang@arm.com>
> ---
> This was converted from RFC patch:
> http://patches.dpdk.org/patch/75543/
> 
>  app/test/test_cpuflags.c                 | 2 +-
>  app/test/test_xmmt_ops.h                 | 2 +-
>  config/arm/meson.build                   | 4 ++--
>  config/meson.build                       | 1 +
>  drivers/bus/fslmc/qbman/qbman_sys_decl.h | 7 ++++---
>  drivers/common/dpaax/compat.h            | 6 ++++--
>  drivers/net/ixgbe/ixgbe_rxtx.h           | 4 ++--
>  drivers/net/virtio/virtio_ethdev.c       | 2 +-
>  lib/librte_acl/meson.build               | 2 +-
>  lib/librte_acl/rte_acl.c                 | 2 --
>  lib/librte_eal/arm/include/rte_vect.h    | 4 ++--
>  lib/librte_eal/common/eal_internal_cfg.h | 2 +-
>  lib/librte_lpm/rte_lpm.h                 | 2 +-
>  13 files changed, 21 insertions(+), 19 deletions(-)
> 
> diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index
> 06718631f..2efa9545d 100644
> --- a/app/test/test_cpuflags.c
> +++ b/app/test/test_cpuflags.c
> @@ -86,7 +86,7 @@ test_cpuflags(void)
>  	CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
>  #endif
> 
> -#if defined(RTE_ARCH_ARM)
> +#if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
>  	printf("Check for NEON:\t\t");
>  	CHECK_FOR_FLAG(RTE_CPUFLAG_NEON);
>  #endif
> diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h index
> 8bcf0b261..3a82d5eca 100644
> --- a/app/test/test_xmmt_ops.h
> +++ b/app/test/test_xmmt_ops.h
> @@ -7,7 +7,7 @@
> 
>  #include <rte_vect.h>
> 
> -#if defined(RTE_ARCH_ARM) || defined(RTE_ARCH_ARM64)
> +#if defined(RTE_ARCH_ARM)
> 
>  /* vect_* abstraction implementation using NEON */
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> 8728051d5..c7ec8cace 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -128,11 +128,11 @@ impl_0x56 = ['Marvell ARMADA', flags_armada,
> machine_args_generic]
>  impl_0x69 = ['Intel', flags_generic, machine_args_generic]  impl_dpaa =
> ['NXP DPAA', flags_dpaa, machine_args_generic]
> 
> +dpdk_conf.set('RTE_ARCH_ARM', 1)
>  dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
> 
> -if not dpdk_conf.get('RTE_ARCH_64')
> +if dpdk_conf.get('RTE_ARCH_32')
>  	dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> -	dpdk_conf.set('RTE_ARCH_ARM', 1)
>  	dpdk_conf.set('RTE_ARCH_ARMv7', 1)
>  	# the minimum architecture supported, armv7-a, needs the following,
>  	# mk/machine/armv7a/rte.vars.mk sets it too diff --git
> a/config/meson.build b/config/meson.build index cff8b33dd..617d13b4c
> 100644
> --- a/config/meson.build
> +++ b/config/meson.build
> @@ -107,6 +107,7 @@ dpdk_conf.set_quoted('RTE_TOOLCHAIN', toolchain)
> dpdk_conf.set('RTE_TOOLCHAIN_' + toolchain.to_upper(), 1)
> 
>  dpdk_conf.set('RTE_ARCH_64', cc.sizeof('void *') == 8)
> +dpdk_conf.set('RTE_ARCH_32', cc.sizeof('void *') == 4)
> 
>  if not is_windows
>  	add_project_link_arguments('-Wl,--no-as-needed', language: 'c') diff
> --git a/drivers/bus/fslmc/qbman/qbman_sys_decl.h
> b/drivers/bus/fslmc/qbman/qbman_sys_decl.h
> index a29f5b469..caaae4177 100644
> --- a/drivers/bus/fslmc/qbman/qbman_sys_decl.h
> +++ b/drivers/bus/fslmc/qbman/qbman_sys_decl.h
> @@ -18,7 +18,8 @@
>  	/****************/
>  	/* arch assists */
>  	/****************/
> -#if defined(RTE_ARCH_ARM64)
> +#if defined(RTE_ARCH_ARM)
> +#if defined(RTE_ARCH_64)
>  #define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); }  #define
> lwsync() { asm volatile("dmb st" : : : "memory"); }  #define dcbf(p) { asm
> volatile("dc cvac, %0" : : "r"(p) : "memory"); } @@ -32,14 +33,14 @@ static
> inline void prefetch_for_store(void *p)  {
>  	asm volatile("prfm pstl1keep, [%0, #0]" : : "r" (p));  } -#elif
> defined(RTE_ARCH_ARM)
> +#else /* RTE_ARCH_32 */
>  #define dcbz(p) memset(p, 0, 64)
>  #define lwsync() { asm volatile("dmb st" : : : "memory"); }
>  #define dcbf(p)	RTE_SET_USED(p)
>  #define dccivac(p)	RTE_SET_USED(p)
>  #define prefetch_for_load(p) { asm volatile ("pld [%0]" : : "r" (p)); }  #define
> prefetch_for_store(p) { asm volatile ("pld [%0]" : : "r" (p)); }
> -
> +#endif
>  #else
>  #define dcbz(p)	RTE_SET_USED(p)
>  #define lwsync()
> diff --git a/drivers/common/dpaax/compat.h
> b/drivers/common/dpaax/compat.h index 6793cb256..1a5f36e99 100644
> --- a/drivers/common/dpaax/compat.h
> +++ b/drivers/common/dpaax/compat.h
> @@ -150,7 +150,8 @@ static inline void out_be32(volatile void *__p, u32 val)
> #define dcbt_ro(p) __builtin_prefetch(p, 0)  #define dcbt_rw(p)
> __builtin_prefetch(p, 1)
> 
> -#if defined(RTE_ARCH_ARM64)
> +#if defined(RTE_ARCH_ARM)
> +#if defined(RTE_ARCH_64)
>  #define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); }  #define
> dcbz_64(p) dcbz(p)  #define dcbf(p) { asm volatile("dc cvac, %0" : : "r"(p) :
> "memory"); } @@ -163,13 +164,14 @@ static inline void out_be32(volatile
> void *__p, u32 val)
>  		asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p));	\
>  	} while (0)
> 
> -#elif defined(RTE_ARCH_ARM)
> +#else /* RTE_ARCH_32 */
>  #define dcbz(p) memset((p), 0, 32)
>  #define dcbz_64(p) memset((p), 0, 64)
>  #define dcbf(p)	RTE_SET_USED(p)
>  #define dcbf_64(p) dcbf(p)
>  #define dccivac(p)	RTE_SET_USED(p)
>  #define dcbit_ro(p)	RTE_SET_USED(p)
> +#endif
> 
>  #else
>  #define dcbz(p)	RTE_SET_USED(p)
> diff --git a/drivers/net/ixgbe/ixgbe_rxtx.h b/drivers/net/ixgbe/ixgbe_rxtx.h
> index 7e09291b2..0b5589ef4 100644
> --- a/drivers/net/ixgbe/ixgbe_rxtx.h
> +++ b/drivers/net/ixgbe/ixgbe_rxtx.h
> @@ -33,7 +33,7 @@
> 
>  #define RTE_IXGBE_DESCS_PER_LOOP    4
> 
> -#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64) ||
> defined(RTE_ARCH_ARM)
> +#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM)
>  #define RTE_IXGBE_RXQ_REARM_THRESH      32
>  #define RTE_IXGBE_MAX_RX_BURST          RTE_IXGBE_RXQ_REARM_THRESH
>  #endif
> @@ -117,7 +117,7 @@ struct ixgbe_rx_queue {
>  	uint8_t            using_ipsec;
>  	/**< indicates that IPsec RX feature is in use */  #endif -#if
> defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64) ||
> defined(RTE_ARCH_ARM)
> +#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM)
>  	uint16_t            rxrearm_nb;     /**< number of remaining to be re-
> armed */
>  	uint16_t            rxrearm_start;  /**< the idx we start the re-arming
> from */
>  #endif
> diff --git a/drivers/net/virtio/virtio_ethdev.c
> b/drivers/net/virtio/virtio_ethdev.c
> index dc0093bdf..405e9f608 100644
> --- a/drivers/net/virtio/virtio_ethdev.c
> +++ b/drivers/net/virtio/virtio_ethdev.c
> @@ -2337,7 +2337,7 @@ virtio_dev_configure(struct rte_eth_dev *dev)
>  		}
> 
>  		if (hw->use_vec_rx) {
> -#if defined RTE_ARCH_ARM64 || defined RTE_ARCH_ARM
> +#if defined RTE_ARCH_ARM
>  			if
> (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON)) {
>  				PMD_DRV_LOG(INFO,
>  					"disabled split ring vectorized path for
> requirement not met"); diff --git a/lib/librte_acl/meson.build
> b/lib/librte_acl/meson.build index d1e2c184c..eadc17757 100644
> --- a/lib/librte_acl/meson.build
> +++ b/lib/librte_acl/meson.build
> @@ -27,7 +27,7 @@ if dpdk_conf.has('RTE_ARCH_X86')
>  		cflags += '-DCC_AVX2_SUPPORT'
>  	endif
> 
> -elif dpdk_conf.has('RTE_ARCH_ARM') or
> dpdk_conf.has('RTE_ARCH_ARM64')
> +elif dpdk_conf.has('RTE_ARCH_ARM')
>  	cflags += '-flax-vector-conversions'
>  	sources += files('acl_run_neon.c')
>  elif dpdk_conf.has('RTE_ARCH_PPC_64')
> diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c index
> 777ec4d34..e2c1ed4ad 100644
> --- a/lib/librte_acl/rte_acl.c
> +++ b/lib/librte_acl/rte_acl.c
> @@ -45,7 +45,6 @@ rte_acl_classify_sse(__rte_unused const struct
> rte_acl_ctx *ctx,  #endif
> 
>  #ifndef RTE_ARCH_ARM
> -#ifndef RTE_ARCH_ARM64
>  int
>  rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
>  	__rte_unused const uint8_t **data,
> @@ -56,7 +55,6 @@ rte_acl_classify_neon(__rte_unused const struct
> rte_acl_ctx *ctx,
>  	return -ENOTSUP;
>  }
>  #endif
> -#endif
> 
>  #ifndef RTE_ARCH_PPC_64
>  int
> diff --git a/lib/librte_eal/arm/include/rte_vect.h
> b/lib/librte_eal/arm/include/rte_vect.h
> index 01c51712a..f6a455b4e 100644
> --- a/lib/librte_eal/arm/include/rte_vect.h
> +++ b/lib/librte_eal/arm/include/rte_vect.h
> @@ -28,7 +28,7 @@ typedef union rte_xmm {
>  	double   pd[XMM_SIZE / sizeof(double)];
>  } __rte_aligned(16) rte_xmm_t;
> 
> -#ifdef RTE_ARCH_ARM
> +#if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
>  /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
> static __inline uint8x16_t  vqtbl1q_u8(uint8x16_t a, uint8x16_t b) @@ -62,7
> +62,7 @@ vaddvq_u16(uint16x8_t a)
> 
>  #endif
> 
> -#if defined(RTE_ARCH_ARM) || \
> +#if (defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)) || \
>  (defined(RTE_ARCH_ARM64) && RTE_CC_IS_GNU && (GCC_VERSION <
> 70000))
>  /* NEON intrinsic vcopyq_laneq_u32() is not supported in ARMv7-A(AArch32)
>   * On AArch64, this intrinsic is supported since GCC version 7.
> diff --git a/lib/librte_eal/common/eal_internal_cfg.h
> b/lib/librte_eal/common/eal_internal_cfg.h
> index 13f93388a..de627c762 100644
> --- a/lib/librte_eal/common/eal_internal_cfg.h
> +++ b/lib/librte_eal/common/eal_internal_cfg.h
> @@ -15,7 +15,7 @@
> 
>  #include "eal_thread.h"
> 
> -#if defined(RTE_ARCH_ARM) || defined(RTE_ARCH_ARM64)
> +#if defined(RTE_ARCH_ARM)
>  #define MAX_HUGEPAGE_SIZES 4  /**< support up to 4 page sizes */  #else
> #define MAX_HUGEPAGE_SIZES 3  /**< support up to 3 page sizes */ diff --
> git a/lib/librte_lpm/rte_lpm.h b/lib/librte_lpm/rte_lpm.h index
> 03da2d37e..5b3b7b5b5 100644
> --- a/lib/librte_lpm/rte_lpm.h
> +++ b/lib/librte_lpm/rte_lpm.h
> @@ -420,7 +420,7 @@ static inline void
>  rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
>  	uint32_t defv);
> 
> -#if defined(RTE_ARCH_ARM) || defined(RTE_ARCH_ARM64)
> +#if defined(RTE_ARCH_ARM)
>  #include "rte_lpm_neon.h"
>  #elif defined(RTE_ARCH_PPC_64)
>  #include "rte_lpm_altivec.h"
> --
> 2.20.1