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Wed, 26 Sep 2018 09:29:12 +0000 From: "Gavin Hu (Arm Technology China)" To: "Gavin Hu (Arm Technology China)" , "dev@dpdk.org" CC: Honnappa Nagarahalli , Steve Capper , Ola Liljedahl , "jerin.jacob@caviumnetworks.com" , nd , "stable@dpdk.org" , Justin He Thread-Topic: [PATCH v3 1/3] ring: read tail using atomic load Thread-Index: AQHUTl7oRf7ShYPLWECgB4oSebTnGqUCWerQ Date: Wed, 26 Sep 2018 09:29:12 +0000 Message-ID: References: <20180807031943.5331-1-gavin.hu@arm.com> <1537172244-64874-1-git-send-email-gavin.hu@arm.com> In-Reply-To: <1537172244-64874-1-git-send-email-gavin.hu@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Gavin.Hu@arm.com; x-originating-ip: [113.29.88.7] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; VI1PR08MB3088; 6:ffhMUovtYnQO752OVwbLxn+Fz/47ujqqfSWwfP7KSXfjatn9rtfUVNieS93P9FeZVabJ85Uqr3yU8WvSpikxIJEHOMDI+DOEVF2YJdylWyh9kJc8M1GgBh5FcVGdHLQpDmVDdVEpq4+FwOL2/e9Fzy3QlySzEFimDqEhgV3QQpAgyTudmjjOUzIa9jDGm2vYQOeAj1hk3KFVyUiQ4krFmSCbSXeqLq4yMqiKLJcDIrn3BJn4g2m9vZsRYUj/QSNlxdaMxtA61Hn9Br0+920yRnkfAB2BrbaQt76LR60MhSvDNO4nRi/6s12zSn4TayF2zaVaGs2oBjD0eziwq/4kFgvXhyIHPvQZrNFncAv9GES+b+TGE3QbgoJ2xytXUa77XZY5mTP0Mfev8Uc/8dYzmhRl6AaQV6RXQ1WI+z3lnh2V+fiYpyhF1hf+sWEtNloRNBLJLaWColRS04UogesEHw==; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 99ae8e0c-aeda-4837-d609-08d623928568 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Sep 2018 09:29:12.8691 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB3088 Subject: Re: [dpdk-dev] [PATCH v3 1/3] ring: read tail using atomic load X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 26 Sep 2018 09:29:15 -0000 +Justin He > -----Original Message----- > From: Gavin Hu > Sent: Monday, September 17, 2018 4:17 PM > To: dev@dpdk.org > Cc: Gavin Hu (Arm Technology China) ; Honnappa > Nagarahalli ; Steve Capper > ; Ola Liljedahl ; > jerin.jacob@caviumnetworks.com; nd ; stable@dpdk.org > Subject: [PATCH v3 1/3] ring: read tail using atomic load >=20 > In update_tail, read ht->tail using __atomic_load.Although the compiler > currently seems to be doing the right thing even without _atomic_load, we > don't want to give the compiler freedom to optimise what should be an > atomic load, it should not be arbitarily moved around. >=20 > Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option") > Cc: stable@dpdk.org >=20 > Signed-off-by: Gavin Hu > Reviewed-by: Honnappa Nagarahalli > Reviewed-by: Steve Capper > Reviewed-by: Ola Liljedahl > --- > lib/librte_ring/rte_ring_c11_mem.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) >=20 > diff --git a/lib/librte_ring/rte_ring_c11_mem.h > b/lib/librte_ring/rte_ring_c11_mem.h > index 94df3c4..234fea0 100644 > --- a/lib/librte_ring/rte_ring_c11_mem.h > +++ b/lib/librte_ring/rte_ring_c11_mem.h > @@ -21,7 +21,8 @@ update_tail(struct rte_ring_headtail *ht, uint32_t > old_val, uint32_t new_val, > * we need to wait for them to complete > */ > if (!single) > - while (unlikely(ht->tail !=3D old_val)) > + while (unlikely(old_val !=3D __atomic_load_n(&ht->tail, > + __ATOMIC_RELAXED))) > rte_pause(); >=20 > __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE); > -- > 2.7.4