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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0801MB1796 Subject: Re: [dpdk-dev] [PATCH v6 0/8] add Nitrox crypto device support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Nagadheeraj, I am no expert in crypto dev, maybe you can educate me if I am wrong:=20 I got an impression in this series, the barriers were used too much, too he= avily and unnecessarily.=20 For enqueue operations, I understand they are stores to the DMA buffer, the= queue will be fetched and updated by the crypto device after processing, t= hen dequeued by the other CPU cores. So for enqueue operations, an rte_io_w= mb is required before the doorbell ringing, and an rte_smp_wmb is required= to ensure the enqueue operations were done before the consumer on the othe= r side(who dequeues) sees the updated pending_count. For dequeue operations= , rte_smp_rmb is required after reading the pending_count to ensure reading= the intact content from the queue(if the queue entries were not handled ye= t by the crypto dev, the status will show that, maybe an rte_io_rmb is requ= ired to ensure the status is read out first). The rte_smp_xmb can even be optimized with C11 atomics, but it can be next = step.=20 Best Regards, Gavin