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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB3437 Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Gavin.Hu@arm.com; X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: VE1EUR03FT037.eop-EUR03.prod.protection.outlook.com X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFTY:; SFS:(4636009)(396003)(376002)(136003)(346002)(39860400002)(46966005)(52536014)(478600001)(82740400003)(47076004)(15650500001)(186003)(4326008)(86362001)(9686003)(55016002)(5660300002)(33656002)(26005)(336012)(70586007)(70206006)(2906002)(54906003)(316002)(36906005)(110136005)(7696005)(356005)(53546011)(6506007)(81166007)(81156014)(82310400002)(8676002)(8936002); DIR:OUT; SFP:1101; X-MS-Office365-Filtering-Correlation-Id-Prvs: d643b1b7-a2e6-4545-5c5b-08d7e9bc824f X-Forefront-PRVS: 03853D523D X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: pOEzFV8dVBHtYa4t3/jb1u6e9LRTMrY4CGUn0/G3YP1CvcI5xZQPUDPnrL7j9fO3qGFAAoWO6KLFwKJSJlMhBKBNfAVfDXzd3OHFmOSQIVkFcLaUHH0Yst3eugVDg0f2s69LqDgfA5UAg8pU0RPOPv9uVDChj8JkGJR+nCQYujdJowAI7YCm/skwIiTBmH0E5d9zY4viNuylFP+VLtTyS8p3IawGCYE7l2H51It201vArPp4mmKlmr/z8W7OR17Gul2+9DVdHJCoeJJkjwN3c5g4qVeRrIDb4poT8V6wXb2WCyjfPWmekWljg/xRZDv8hxx9+H+54MA2QcEWfqdDb+Fvx5O6G49fb3nkh6bjtWHZ6/OvgHkpwJWkDb8O1y16mKVZZax5Il3D8l6UYhQFppRn/onD9sLrfUZqukpxPDedvkYQKGzw6eu0rjSq/AQXovFwi2LHR8gIyqlLqRdbRUDJQXjNsKedmz1xxn1FrtjJ1Ldv2JyKzwThMqQXW0gszvz480KoXwkySQ+V7DLwkg== X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Apr 2020 08:33:41.8488 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c928eb8b-409b-4834-5fa8-08d7e9bc86b8 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6SPR01MB08 Subject: Re: [dpdk-dev] [PATCH v1 2/2] ring: use wfe to wait for ring tail update on aarch64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Honnappa, > -----Original Message----- > From: Honnappa Nagarahalli > Sent: Friday, April 24, 2020 10:46 PM > To: Gavin Hu ; dev@dpdk.org > Cc: nd ; david.marchand@redhat.com; > thomas@monjalon.net; jerinj@marvell.com; Ruifeng Wang > ; Phil Yang ; Joyce Kong > ; Honnappa Nagarahalli > ; nd > Subject: RE: [PATCH v1 2/2] ring: use wfe to wait for ring tail update on > aarch64 >=20 > >=20 > Hi Gavin, > There are other sync modes added to rte_ring library. Can you > please extend this to other rte_pause() calls in the library? I looked into the other two calls to rte_cause, they can't use the rte_wait= _until_equal_XX APIs simply. Maybe new APIs are required?=20 Here is the 32-bit API for your reference: rte_wait_until_equal_32(volatile uint32_t *addr, uint32_t expected, int mem= order) >=20 > Thanks, > Honnappa >=20 > > Subject: [PATCH v1 2/2] ring: use wfe to wait for ring tail update on > aarch64 > > > > Instead of polling for tail to be updated, use wfe instruction. > > > > Signed-off-by: Gavin Hu > > Reviewed-by: Ruifeng Wang > > Reviewed-by: Steve Capper > > Reviewed-by: Ola Liljedahl > > Reviewed-by: Honnappa Nagarahalli > > --- > > lib/librte_ring/rte_ring_c11_mem.h | 4 ++-- > > lib/librte_ring/rte_ring_generic.h | 3 +-- > > 2 files changed, 3 insertions(+), 4 deletions(-) > > > > diff --git a/lib/librte_ring/rte_ring_c11_mem.h > > b/lib/librte_ring/rte_ring_c11_mem.h > > index 0fb73a337..764d8f186 100644 > > --- a/lib/librte_ring/rte_ring_c11_mem.h > > +++ b/lib/librte_ring/rte_ring_c11_mem.h > > @@ -2,6 +2,7 @@ > > * > > * Copyright (c) 2017,2018 HXT-semitech Corporation. > > * Copyright (c) 2007-2009 Kip Macy kmacy@freebsd.org > > + * Copyright (c) 2019 Arm Limited > > * All rights reserved. > > * Derived from FreeBSD's bufring.h > > * Used as BSD-3 Licensed with permission from Kip Macy. > > @@ -21,8 +22,7 @@ update_tail(struct rte_ring_headtail *ht, uint32_t > > old_val, uint32_t new_val, > > * we need to wait for them to complete > > */ > > if (!single) > > - while (unlikely(ht->tail !=3D old_val)) > > - rte_pause(); > > + rte_wait_until_equal_relaxed_32(&ht->tail, old_val); > > > > __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE); } diff -- > > git a/lib/librte_ring/rte_ring_generic.h b/lib/librte_ring/rte_ring_gen= eric.h > > index 953cdbbd5..682852783 100644 > > --- a/lib/librte_ring/rte_ring_generic.h > > +++ b/lib/librte_ring/rte_ring_generic.h > > @@ -23,8 +23,7 @@ update_tail(struct rte_ring_headtail *ht, uint32_t > > old_val, uint32_t new_val, > > * we need to wait for them to complete > > */ > > if (!single) > > - while (unlikely(ht->tail !=3D old_val)) > > - rte_pause(); > > + rte_wait_until_equal_relaxed_32(&ht->tail, old_val); > > > > ht->tail =3D new_val; > > } > > -- > > 2.17.1