From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E837BA034F; Fri, 7 May 2021 12:24:55 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C76634013F; Fri, 7 May 2021 12:24:55 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id 987AB40040 for ; Fri, 7 May 2021 12:24:53 +0200 (CEST) IronPort-SDR: SUZ0bWnKRq6QYfSfCdXIZyfJQ/YZkW+8boTSNLhJWjDz0QSWZq/c3m1jcGmY4OoovvxnLZRUc+ L4aZmyd6XajA== X-IronPort-AV: E=McAfee;i="6200,9189,9976"; a="195586665" X-IronPort-AV: E=Sophos;i="5.82,280,1613462400"; d="scan'208";a="195586665" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 May 2021 03:24:51 -0700 IronPort-SDR: +fMem0Rm/H+XsB3CCYnQchZXYK1j0e/o9QCSmX6cJVYjzHiUDEpUmCJOJcsKJeHmfclDxjAVPB CB1zmTWdJxAQ== X-IronPort-AV: E=Sophos;i="5.82,280,1613462400"; d="scan'208";a="431240114" Received: from bricha3-mobl.ger.corp.intel.com ([10.252.20.188]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 07 May 2021 03:24:49 -0700 Date: Fri, 7 May 2021 11:24:46 +0100 From: Bruce Richardson To: Ruifeng Wang Cc: Honnappa Nagarahalli , "thomas@monjalon.net" , David Marchand , dev , "jerinj@marvell.com" , nd Message-ID: References: <20200424070741.16619-1-gavin.hu@arm.com> <2370044.79WzprfWfc@thomas> <20248566.ii5BvqWlRQ@thomas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [dpdk-dev] Use WFE for spinlock and ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, May 07, 2021 at 10:18:52AM +0000, Ruifeng Wang wrote: > > -----Original Message----- > > From: Bruce Richardson > > Sent: Friday, April 30, 2021 10:19 PM > > To: Honnappa Nagarahalli > > Cc: thomas@monjalon.net; Ruifeng Wang ; David > > Marchand ; dev ; > > jerinj@marvell.com; nd > > Subject: Re: Use WFE for spinlock and ring > > > > On Fri, Apr 30, 2021 at 01:41:22PM +0000, Honnappa Nagarahalli wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > The rte_wait_until_equal_xxx APIs abstract the > > > > > > > > > > functionality of 'polling for a memory location to > > > > > > > > > > become equal to a given > > > > value'[1]. > > > > > > > > > > > > > > > > > > > > Use the API for the rte spinlock and ring implementations. > > > > > > > > > > With the wait until equal APIs being stable, changes > > > > > > > > > > will not impact > > > > ABI. > > > > > > > > > > > > > > > > > > Afaics, there is no ARM target with WFE enabled and we > > > > > > > > > lost ability to enable WFE support with removal of the > > > > > > > > > make build > > > > system. > > > > > > > > > > > > > > > > WFE can be enabled with direct meson file change. > > > > > > > > WFE is not intended to be enabled by default. It can be > > > > > > > > enabled based on benchmarking result on hardware. > > > > > > > > > > > > > > > > > > $ git grep RTE_ARM_USE_WFE > > > > > > > > > config/arm/meson.build: ['RTE_ARM_USE_WFE', false], > > > > > > > > > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE > > > > > > > > > > > > > > > > > > How did you enable WFE to test this series? > > > > > > > > > > > > > > > > I modified meson file to test. > > > > > > > > Tests were also done with WFE disabled to make sure no > > > > > > > > degradation with > > > > > > > generic implementation. > > > > > > > > > > > > > > I don't understand the usage. > > > > > > > Which platform should use it? > > > > > > > > > > > > Platforms that implement WFE semantic (e.g. N1) can use. > > > > > > The user can enable this feature for power efficiency purpose. > > > > > > But there is something to note as described in commit message > > > > > > 1be7855d77 > > > > when the API was introduced. > > > > > > > > > > > > > Should it be a compile-time option? > > > > > > > > > > > > Yes, it should be a compile-time option. > > > > > > It can be configured via c_args meson option? > > > > > > > > > > +Cc Bruce for discussing how to enable such feature. > > > > > > > > > > The problem with c_args is that the application has no way to know. > > > > > > > > > Agree about c_args not being a great choice. Why does this need to > > > > be a compile-time option? Can runtime support not be detected in > > > > some manner? > > > The problem is inconsistency in performance on different Arm platforms. > > We had decided that each platform needs to enable it after some testing. > > > > Then it sounds like it does indeed need to be a build option. Does it need to > > be added to the meson_options.txt, or can it just be specified in cross-files > > and optionally via c_args? > > Add it to the meson_options.txt is good as the option will be clearly exposed. > My concern is more options (e.g. RTE_ARCH_ARM64_MEMCPY) need to be added in. > Will the options bloat meson_options.txt? That bloat would indeed become a concern. We may need to look at more use of auto-detection and cross files for such options.