From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2D87AA0C43; Fri, 22 Oct 2021 10:45:28 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B604A41103; Fri, 22 Oct 2021 10:45:27 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 762064069D for ; Fri, 22 Oct 2021 10:45:26 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10144"; a="229126492" X-IronPort-AV: E=Sophos;i="5.87,172,1631602800"; d="scan'208";a="229126492" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Oct 2021 01:45:25 -0700 X-IronPort-AV: E=Sophos;i="5.87,172,1631602800"; d="scan'208";a="484598449" Received: from bricha3-mobl.ger.corp.intel.com ([10.252.0.203]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Oct 2021 01:45:22 -0700 Date: Fri, 22 Oct 2021 09:45:19 +0100 From: Bruce Richardson To: Thomas Monjalon Cc: keesang.song@amd.com, Aman Kumar , dev@dpdk.org, rasland@nvidia.com, asafp@nvidia.com, shys@nvidia.com, viacheslavo@nvidia.com, akozyrev@nvidia.com, matan@nvidia.com, anatoly.burakov@intel.com, jerinjacobk@gmail.com Message-ID: References: <20210823084411.29592-1-aman.kumar@vvdntech.in> <20211019104724.19416-1-aman.kumar@vvdntech.in> <2479122.cfcLeCfLrI@thomas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2479122.cfcLeCfLrI@thomas> Subject: Re: [dpdk-dev] [PATCH v2 1/2] lib/eal: add amd epyc2 memcpy routine to eal X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, Oct 21, 2021 at 10:14:47PM +0200, Thomas Monjalon wrote: > 19/10/2021 12:47, Aman Kumar: > > This patch provides rte_memcpy* calls optimized for > > AMD EPYC platforms. Use config/x86/x86_amd_epyc_linux_gcc > > as cross-file with meson to build dpdk for AMD EPYC platforms. > [...] > > --- a/config/x86/meson.build > > +++ b/config/x86/meson.build > > @@ -72,3 +72,10 @@ endif > > dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) > > dpdk_conf.set('RTE_MAX_LCORE', 128) > > dpdk_conf.set('RTE_MAX_NUMA_NODES', 32) > > + > > +if meson.is_cross_build() > > + if meson.get_cross_property('platform') == 'amd-epyc' > > + dpdk_conf.set('RTE_MAX_LCORE', 512) > > + dpdk_conf.set('RTE_MEMCPY_AMDEPYC', 1) > > + endif > > +endif > > Thinking again about the cross file. > Why not using the meson option "cpu_instruction_set" > to define RTE_MACHINE as "epyc" and tune other compilation options > without using artificial cross build? > > Reminder, the default in config/meson.build is: > if cpu_instruction_set == 'generic' > if host_machine.cpu_family().startswith('x86') > cpu_instruction_set = 'corei7' > > Cc Bruce who maintains this meson code. > Yes, that is a good suggestion. You could detect a particular instruction set value and set additional defines based on it. /Bruce