Re: [PATCH v5 0/1] use 64-bit shift, avoid signed/unsigned mismatch

[Bruce Richardson <bruce.richardson@intel.com>]

On Fri, Feb 07, 2025 at 11:01:57AM -0800, Stephen Hemminger wrote:
> On Fri,  7 Feb 2025 09:41:08 -0800
> Andre Muezerie <andremue@linux.microsoft.com> wrote:
> 
> > This patch avoids warnings like the ones below emitted by MSVC:
> > 
> > 1)
> > ../drivers/net/ice/base/ice_flg_rd.c(71): warning C4334: '<<':
> >     result of 32-bit shift implicitly converted to 64 bits
> >     (was 64-bit shift intended?)
> > 
> > 2)
> > ../drivers/net/ice/ice_dcf_sched.c(177): warning C4018: '>=':
> >     signed/unsigned mismatch
> > 
> > The fix for (1) is to use 64-bit shifting when appropriate
> > (according to what the result is used for).
> > 
> > The fix for (2) is to explicitly cast the variables used in the
> > comparison.
> > 
> > v5:
> >  * rebase
> >  * use uint32_t instead of uint32, to better conform to DPDK standards
> >  * rename variable rqID to rq_id to better conform to DPDK standards
> >    and avoid checkpatch warning
> >  * use 2U instead of (uint32)2, which is shorter
> >  * simplify expression in meson.build using compiler id "gcc"
> > 
> > Andre Muezerie (1):
> >   drivers/net: use 64-bit shift and avoid signed/unsigned mismatch
> > 
> >  drivers/net/intel/i40e/i40e_ethdev.c   | 22 +++++++++++-----------
> >  drivers/net/intel/iavf/iavf_ethdev.c   |  2 +-
> >  drivers/net/intel/iavf/iavf_rxtx.c     |  2 +-
> >  drivers/net/intel/iavf/iavf_vchnl.c    |  2 +-
> >  drivers/net/intel/ice/base/meson.build | 19 +++++++++++++------
> >  drivers/net/intel/ice/ice_dcf_sched.c  |  2 +-
> >  drivers/net/intel/ice/ice_ethdev.c     |  4 ++--
> >  drivers/net/intel/ice/ice_rxtx.c       |  2 +-
> >  drivers/net/intel/ixgbe/ixgbe_ethdev.c |  2 +-
> >  9 files changed, 32 insertions(+), 25 deletions(-)
> 
> 
> Since all intel, this should get picked up by next-intel

V4 had some non-intel changes too. Did they get missed in v5?