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Date: Tue, 4 Apr 2023 09:53:21 +0100
From: Bruce Richardson <bruce.richardson@intel.com>
To: Tyler Retzlaff <roretzla@linux.microsoft.com>
CC: <dev@dpdk.org>, <david.marchand@redhat.com>, <thomas@monjalon.net>,
<mb@smartsharesystems.com>
Subject: Re: [PATCH 3/9] eal: use barrier intrinsics when compiling with msvc
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On Mon, Apr 03, 2023 at 02:52:25PM -0700, Tyler Retzlaff wrote:
> Inline assembly is not supported for msvc x64 instead use
> _{Read,Write,ReadWrite}Barrier() intrinsics.
>
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> ---
> lib/eal/include/generic/rte_atomic.h | 4 ++++
> lib/eal/x86/include/rte_atomic.h | 10 +++++++++-
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
> index 234b268..e973184 100644
> --- a/lib/eal/include/generic/rte_atomic.h
> +++ b/lib/eal/include/generic/rte_atomic.h
> @@ -116,9 +116,13 @@
> * Guarantees that operation reordering does not occur at compile time
> * for operations directly before and after the barrier.
> */
> +#ifndef RTE_TOOLCHAIN_MSVC
> #define rte_compiler_barrier() do { \
> asm volatile ("" : : : "memory"); \
> } while(0)
> +#else
> +#define rte_compiler_barrier() _ReadWriteBarrier()
Does this actually add a full memory barrier? If so, that's really not what we
want, and will slow things down.