From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B47CA04C8; Fri, 18 Sep 2020 13:58:58 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 295631D9AC; Fri, 18 Sep 2020 13:58:58 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id CCA6A1D9AA for ; Fri, 18 Sep 2020 13:58:55 +0200 (CEST) IronPort-SDR: d/6YCsaNrcYYATXQYmT2I/beyWmFC0kEgnwx14x2F/IoFUF9cwTpGa1+C/v2RRBOEQWu0oAKOD gDab+ZDMEziQ== X-IronPort-AV: E=McAfee;i="6000,8403,9747"; a="178007652" X-IronPort-AV: E=Sophos;i="5.77,274,1596524400"; d="scan'208";a="178007652" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2020 04:58:53 -0700 IronPort-SDR: /kIZkJ4Wj53Lvilzz5+nYM1pQhUBar5uDYSC5tGBQmARBw1/Nq2ThhRMaDtZ3FWIm2c9ae9nOc MjRgm7WlwSRg== X-IronPort-AV: E=Sophos;i="5.77,274,1596524400"; d="scan'208";a="484176464" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.227.248]) ([10.213.227.248]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2020 04:58:51 -0700 To: jgrajcia@cisco.com Cc: Honnappa.Nagarahalli@arm.com, Ruifeng.Wang@arm.com, nd@arm.com, Phil Yang , dev@dpdk.org References: <1599802699-20876-1-git-send-email-phil.yang@arm.com> From: Ferruh Yigit Message-ID: Date: Fri, 18 Sep 2020 12:58:47 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.2.2 MIME-Version: 1.0 In-Reply-To: <1599802699-20876-1-git-send-email-phil.yang@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH] net/memif: relax barrier for zero copy path X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 9/11/2020 6:38 AM, Phil Yang wrote: > Using 'rte_mb' to synchronize the shared ring head/tail between producer > and consumer will stall the pipeline and damage performance on the weak > memory model platforms, such like aarch64. > > Relax the expensive barrier with c11 atomic with explicit memory > ordering can improve 3.6% performance on throughput. > > Signed-off-by: Phil Yang > Reviewed-by: Ruifeng Wang Hi Jakub, Can you please check/test this patch? Thanks, ferruh