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From: Jeff Guo <jia.guo@intel.com>
To: alvinx.zhang@intel.com, dev@dpdk.org
Cc: wei.zhao1@intel.com, xiaolong.ye@intel.com
Subject: Re: [dpdk-dev] [PATCH] net/igc: fix memory illegal accesses
Date: Thu, 7 May 2020 14:30:17 +0800	[thread overview]
Message-ID: <a39fcda1-2151-e207-35ba-278a85a40799@intel.com> (raw)
In-Reply-To: <20200507020133.14412-1-alvinx.zhang@intel.com>

hi, alvin


On 5/7/2020 10:01 AM, alvinx.zhang@intel.com wrote:
> From: Alvin Zhang <alvinx.zhang@intel.com>
>
> Add memory access out-of-bounds check.


Could you explain why add ...?  If not add, what issue?


>
> Fixes: bd3fcf0d0fa1 (net/igc: support RSS)
> Cc: stable@dpdk.org
>
> Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
> ---
>   drivers/net/igc/igc_ethdev.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c
> index 16d98c6..ced8ffd 100644
> --- a/drivers/net/igc/igc_ethdev.c
> +++ b/drivers/net/igc/igc_ethdev.c
> @@ -2266,6 +2266,8 @@ static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,
>   		return -EINVAL;
>   	}
>   
> +	RTE_BUILD_BUG_ON(ETH_RSS_RETA_SIZE_128 % IGC_RSS_RDT_REG_SIZE);
> +
>   	/* set redirection table */
>   	for (i = 0; i < ETH_RSS_RETA_SIZE_128; i += IGC_RSS_RDT_REG_SIZE) {
>   		union igc_rss_reta_reg reta, reg;
> @@ -2278,7 +2280,8 @@ static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,
>   				IGC_RSS_RDT_REG_SIZE_MASK);
>   
>   		/* if no need to update the register */
> -		if (!mask)
> +		if (!mask ||
> +			shift > (RTE_RETA_GROUP_SIZE - IGC_RSS_RDT_REG_SIZE))


alignment should be match above parentheses.


>   			continue;
>   
>   		/* check mask whether need to read the register value first */
> @@ -2289,6 +2292,7 @@ static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,
>   					IGC_RETA(i / IGC_RSS_RDT_REG_SIZE));
>   
>   		/* update the register */
> +		RTE_BUILD_BUG_ON(sizeof(reta.bytes) != IGC_RSS_RDT_REG_SIZE);
>   		for (j = 0; j < IGC_RSS_RDT_REG_SIZE; j++) {
>   			if (mask & (1u << j))
>   				reta.bytes[j] =
> @@ -2318,6 +2322,8 @@ static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,
>   		return -EINVAL;
>   	}
>   
> +	RTE_BUILD_BUG_ON(ETH_RSS_RETA_SIZE_128 % IGC_RSS_RDT_REG_SIZE);
> +
>   	/* read redirection table */
>   	for (i = 0; i < ETH_RSS_RETA_SIZE_128; i += IGC_RSS_RDT_REG_SIZE) {
>   		union igc_rss_reta_reg reta;
> @@ -2330,12 +2336,14 @@ static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,
>   				IGC_RSS_RDT_REG_SIZE_MASK);
>   
>   		/* if no need to read register */
> -		if (!mask)
> +		if (!mask ||
> +			shift > (RTE_RETA_GROUP_SIZE - IGC_RSS_RDT_REG_SIZE))


the same as above.


>   			continue;
>   
>   		/* read register and get the queue index */
>   		reta.dword = IGC_READ_REG_LE_VALUE(hw,
>   				IGC_RETA(i / IGC_RSS_RDT_REG_SIZE));
> +		RTE_BUILD_BUG_ON(sizeof(reta.bytes) != IGC_RSS_RDT_REG_SIZE);


need null line or no need, please check it at the place and before.


>   		for (j = 0; j < IGC_RSS_RDT_REG_SIZE; j++) {
>   			if (mask & (1u << j))
>   				reta_conf[idx].reta[shift + j] = reta.bytes[j];

  reply	other threads:[~2020-05-07  6:30 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-07  2:01 alvinx.zhang
2020-05-07  6:30 ` Jeff Guo [this message]
2020-05-07  8:08   ` Zhang, AlvinX
2020-05-07  9:08 ` [dpdk-dev] [PATCH v2] " alvinx.zhang
2020-05-07  9:31   ` alvinx.zhang
2020-05-08  5:09     ` Jeff Guo
2020-05-08  8:27     ` Ye Xiaolong
2020-05-08  8:54     ` [dpdk-dev] [PATCH v3] " alvinx.zhang
2020-05-12  5:23       ` Ye Xiaolong

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