From: Ferruh Yigit <ferruh.yigit@intel.com>
To: Harman Kalra <hkalra@marvell.com>,
Thomas Monjalon <thomas@monjalon.net>,
Jerin Jacob <jerinj@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
John McNamara <john.mcnamara@intel.com>,
Marko Kovacevic <marko.kovacevic@intel.com>,
Kiran Kumar K <kirankumark@marvell.com>
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH v2] net/octeontx2: add cn98xx support
Date: Fri, 26 Jun 2020 10:40:16 +0100 [thread overview]
Message-ID: <a477d278-dc42-5082-d242-7aab25d042f3@intel.com> (raw)
In-Reply-To: <1593002808-29161-1-git-send-email-hkalra@marvell.com>
On 6/24/2020 1:46 PM, Harman Kalra wrote:
> New cn98xx SOC comes up with two NIX blocks wrt
> cn96xx, cn93xx, to achieve higher performance.
> Also the no of cores increased to 36 from 24.
>
> Adding support for cn98xx where need a logic to
> detect if the LF is attached to NIX0 or NIX1 and
> then accordingly use the respective NIX block.
>
> Signed-off-by: Harman Kalra <hkalra@marvell.com>
> ---
> *V2: updated make/meson configs with the increased no of
> cores.
Since this is new SoC support I think can be good to highlight in the release
notes, what do you think?
next prev parent reply other threads:[~2020-06-26 9:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-17 15:05 [dpdk-dev] [PATCH] " Harman Kalra
2020-06-24 8:59 ` Jerin Jacob
2020-06-24 12:46 ` [dpdk-dev] [PATCH v2] " Harman Kalra
2020-06-25 15:33 ` Jerin Jacob
2020-06-26 9:40 ` Ferruh Yigit [this message]
2020-06-26 13:34 ` [dpdk-dev] [EXT] " Harman Kalra
2020-06-26 13:45 ` Ferruh Yigit
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